[people/ms/u-boot.git] / include / configs / omap4_sdp4430.h

/*
 * (C) Copyright 2010
 * Texas Instruments Incorporated.
 * Aneesh V       <aneesh@ti.com>
 * Steve Sakoman  <steve@sakoman.com>
 *
 * Configuration settings for the TI SDP4430 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
#define CONFIG_OMAP		1	/* in a TI OMAP core */
#define CONFIG_OMAP44XX		1	/* which is a 44XX */
#define CONFIG_OMAP4430		1	/* which is in a 4430 */
#define CONFIG_4430SDP		1	/* working with SDP */
#define CONFIG_ARCH_CPU_INIT

/* Get CPU defs */
#include <asm/arch/cpu.h>
#include <asm/arch/omap4.h>

/* Display CPU and Board Info */
#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

/* Keep L2 Cache Disabled */
#define CONFIG_L2_OFF			1

/* Clock Defines */
#define V_OSCK			38400000	/* Clock output from T2 */
#define V_SCLK                   V_OSCK

#undef CONFIG_USE_IRQ				/* no support for IRQs */
#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_REVISION_TAG		1

/*
 * Size of malloc() pool
 * Total Size Environment - 128k
 * Malloc - add 256k
 */
#define CONFIG_ENV_SIZE			(128 << 10)
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
						/* initial data */
/* Vector Base */
#define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE

/*
 * Hardware drivers
 */

/*
 * serial port - NS16550 compatible
 */
#define V_NS16550_CLK			48000000

#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
#define CONFIG_CONS_INDEX		3
#define CONFIG_SYS_NS16550_COM3		UART3_BASE

#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
					115200}
/* I2C  */
#define CONFIG_HARD_I2C			1
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_SYS_I2C_BUS		0
#define CONFIG_SYS_I2C_BUS_SELECT	1
#define CONFIG_DRIVER_OMAP34XX_I2C	1
#define CONFIG_I2C_MULTI_BUS		1

/* TWL6030 */
#define CONFIG_TWL6030_POWER		1
#define CONFIG_CMD_BAT			1

/* MMC */
#define CONFIG_GENERIC_MMC		1
#define CONFIG_MMC			1
#define CONFIG_OMAP_HSMMC		1
#define CONFIG_SYS_MMC_SET_DEV		1
#define CONFIG_DOS_PARTITION		1

/* MMC ENV related defines */
#define CONFIG_ENV_IS_IN_MMC		1
#define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
#define CONFIG_ENV_OFFSET		0xE0000

/* USB */
#define CONFIG_MUSB_UDC			1
#define CONFIG_USB_OMAP3		1

/* USB device configuration */
#define CONFIG_USB_DEVICE		1
#define CONFIG_USB_TTY			1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1

/* Flash */
#define CONFIG_SYS_NO_FLASH	1

/* commands to include */
#include <config_cmd_default.h>

/* Enabled commands */
#define CONFIG_CMD_EXT2		/* EXT2 Support                 */
#define CONFIG_CMD_FAT		/* FAT support                  */
#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
#define CONFIG_CMD_MMC		/* MMC support                  */
#define CONFIG_CMD_SAVEENV

/* Disabled commands */
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
#undef CONFIG_CMD_IMLS		/* List all found images        */

/*
 * Environment setup
 */

#define CONFIG_BOOTDELAY	3

#define CONFIG_ENV_OVERWRITE

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x82000000\0" \
	"console=ttyS2,115200n8\0" \
	"usbtty=cdc_acm\0" \
	"vram=16M\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext3 rootwait\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"vram=${vram} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
		"source ${loadaddr}\0" \
	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"if mmc rescan ${mmcdev}; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loaduimage; then " \
				"run mmcboot; " \
			"fi; " \
		"fi; " \
	"fi"

#define CONFIG_AUTO_COMPLETE		1

/*
 * Miscellaneous configurable options
 */

#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_PROMPT		"OMAP4430 SDP # "
#define CONFIG_SYS_CBSIZE		256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

/*
 * memtest setup
 */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))

/* Default load address */
#define CONFIG_SYS_LOAD_ADDR		0x80000000

/* Use General purpose timer 1 */
#define CONFIG_SYS_TIMERBASE		GPT2_BASE
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ			1000

/*
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128 << 10)	/* Regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack */
#endif

/*
 * SDRAM Memory Map
 * Even though we use two CS all the memory
 * is mapped to one contiguous block
 */
#define CONFIG_NR_DRAM_BANKS	1

#define CONFIG_SYS_SDRAM_BASE		0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR	0x4030D800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
3e76d62a SS	1	/*
	2	* (C) Copyright 2010
	3	* Texas Instruments Incorporated.
	4	* Aneesh V <aneesh@ti.com>
	5	* Steve Sakoman <steve@sakoman.com>
	6	*
	7	* Configuration settings for the TI SDP4430 board.
	8	*
	9	* See file CREDITS for list of people who contributed to this
	10	* project.
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License as
	14	* published by the Free Software Foundation; either version 2 of
	15	* the License, or (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, write to the Free Software
	24	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	25	* MA 02111-1307 USA
	26	*/
	27
	28	#ifndef __CONFIG_H
	29	#define __CONFIG_H
	30
	31	/*
	32	* High Level Configuration Options
	33	*/
	34	#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
	35	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	36	#define CONFIG_OMAP44XX 1 /* which is a 44XX */
	37	#define CONFIG_OMAP4430 1 /* which is in a 4430 */
	38	#define CONFIG_4430SDP 1 /* working with SDP */
2ad853c3	39	#define CONFIG_ARCH_CPU_INIT
3e76d62a SS	40
	41	/* Get CPU defs */
	42	#include <asm/arch/cpu.h>
	43	#include <asm/arch/omap4.h>
	44
	45	/* Display CPU and Board Info */
	46	#define CONFIG_DISPLAY_CPUINFO 1
	47	#define CONFIG_DISPLAY_BOARDINFO 1
	48
	49	/* Keep L2 Cache Disabled */
	50	#define CONFIG_L2_OFF 1
	51
	52	/* Clock Defines */
	53	#define V_OSCK 38400000 /* Clock output from T2 */
	54	#define V_SCLK V_OSCK
	55
	56	#undef CONFIG_USE_IRQ /* no support for IRQs */
	57	#define CONFIG_MISC_INIT_R
	58
	59	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	60	#define CONFIG_SETUP_MEMORY_TAGS 1
	61	#define CONFIG_INITRD_TAG 1
	62	#define CONFIG_REVISION_TAG 1
	63
	64	/*
	65	* Size of malloc() pool
64455352	66	* Total Size Environment - 128k
3e76d62a SS	67	* Malloc - add 256k
3e76d62a SS	68	*/
64455352	69	#define CONFIG_ENV_SIZE (128 << 10)
3e76d62a	70	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
3e76d62a SS	71	/* initial data */
	72	/* Vector Base */
	73	#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
	74
	75	/*
	76	* Hardware drivers
	77	*/
	78
	79	/*
	80	* serial port - NS16550 compatible
	81	*/
	82	#define V_NS16550_CLK 48000000
	83
	84	#define CONFIG_SYS_NS16550
	85	#define CONFIG_SYS_NS16550_SERIAL
	86	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	87	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	88	#define CONFIG_CONS_INDEX 3
	89	#define CONFIG_SYS_NS16550_COM3 UART3_BASE
	90
3e76d62a SS	91	#define CONFIG_BAUDRATE 115200
	92	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
	93	115200}
3e76d62a SS	94	/* I2C */
	95	#define CONFIG_HARD_I2C 1
	96	#define CONFIG_SYS_I2C_SPEED 100000
	97	#define CONFIG_SYS_I2C_SLAVE 1
	98	#define CONFIG_SYS_I2C_BUS 0
	99	#define CONFIG_SYS_I2C_BUS_SELECT 1
	100	#define CONFIG_DRIVER_OMAP34XX_I2C 1
	101	#define CONFIG_I2C_MULTI_BUS 1
	102
516799f6 SS	103	/* TWL6030 */
516799f6 SS	104	#define CONFIG_TWL6030_POWER 1
3e664f6d	105	#define CONFIG_CMD_BAT 1
516799f6	106
3e76d62a	107	/* MMC */
084c4c1b	108	#define CONFIG_GENERIC_MMC 1
3e76d62a	109	#define CONFIG_MMC 1
084c4c1b	110	#define CONFIG_OMAP_HSMMC 1
3e76d62a SS	111	#define CONFIG_SYS_MMC_SET_DEV 1
	112	#define CONFIG_DOS_PARTITION 1
	113
64455352 SG	114	/* MMC ENV related defines */
	115	#define CONFIG_ENV_IS_IN_MMC 1
	116	#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
	117	#define CONFIG_ENV_OFFSET 0xE0000
	118
325abab7 SS	119	/* USB */
	120	#define CONFIG_MUSB_UDC 1
	121	#define CONFIG_USB_OMAP3 1
	122
	123	/* USB device configuration */
	124	#define CONFIG_USB_DEVICE 1
	125	#define CONFIG_USB_TTY 1
	126	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
325abab7	127
3e76d62a SS	128	/* Flash */
	129	#define CONFIG_SYS_NO_FLASH 1
	130
	131	/* commands to include */
	132	#include <config_cmd_default.h>
	133
	134	/* Enabled commands */
	135	#define CONFIG_CMD_EXT2 /* EXT2 Support */
	136	#define CONFIG_CMD_FAT /* FAT support */
	137	#define CONFIG_CMD_I2C /* I2C serial bus support */
	138	#define CONFIG_CMD_MMC /* MMC support */
64455352	139	#define CONFIG_CMD_SAVEENV
3e76d62a SS	140
	141	/* Disabled commands */
	142	#undef CONFIG_CMD_NET
35cf884d	143	#undef CONFIG_CMD_NFS
3e76d62a SS	144	#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
	145	#undef CONFIG_CMD_IMLS /* List all found images */
	146
3e76d62a SS	147	/*
	148	* Environment setup
	149	*/
	150
1b03eede SS	151	#define CONFIG_BOOTDELAY 3
1b03eede SS	152
3e76d62a SS	153	#define CONFIG_ENV_OVERWRITE
	154
	155	#define CONFIG_EXTRA_ENV_SETTINGS \
	156	"loadaddr=0x82000000\0" \
	157	"console=ttyS2,115200n8\0" \
325abab7	158	"usbtty=cdc_acm\0" \
1b03eede	159	"vram=16M\0" \
084c4c1b	160	"mmcdev=0\0" \
3e76d62a SS	161	"mmcroot=/dev/mmcblk0p2 rw\0" \
	162	"mmcrootfstype=ext3 rootwait\0" \
	163	"mmcargs=setenv bootargs console=${console} " \
1b03eede	164	"vram=${vram} " \
3e76d62a SS	165	"root=${mmcroot} " \
	166	"rootfstype=${mmcrootfstype}\0" \
	167	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	168	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
	169	"source ${loadaddr}\0" \
	170	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
	171	"mmcboot=echo Booting from mmc${mmcdev} ...; " \
	172	"run mmcargs; " \
	173	"bootm ${loadaddr}\0" \
	174
	175	#define CONFIG_BOOTCOMMAND \
084c4c1b	176	"if mmc rescan ${mmcdev}; then " \
3e76d62a SS	177	"if run loadbootscript; then " \
	178	"run bootscript; " \
	179	"else " \
	180	"if run loaduimage; then " \
	181	"run mmcboot; " \
3e76d62a SS	182	"fi; " \
	183	"fi; " \
	184	"fi"
	185
	186	#define CONFIG_AUTO_COMPLETE 1
	187
	188	/*
	189	* Miscellaneous configurable options
	190	*/
	191
	192	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	193	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
	194	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	195	#define CONFIG_SYS_PROMPT "OMAP4430 SDP # "
	196	#define CONFIG_SYS_CBSIZE 256
	197	/* Print Buffer Size */
	198	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	199	sizeof(CONFIG_SYS_PROMPT) + 16)
	200	#define CONFIG_SYS_MAXARGS 16
	201	/* Boot Argument Buffer Size */
	202	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	203
	204	/*
	205	* memtest setup
	206	*/
	207	#define CONFIG_SYS_MEMTEST_START 0x80000000
	208	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
	209
	210	/* Default load address */
	211	#define CONFIG_SYS_LOAD_ADDR 0x80000000
	212
	213	/* Use General purpose timer 1 */
674e0b21	214	#define CONFIG_SYS_TIMERBASE GPT2_BASE
3e76d62a SS	215	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
	216	#define CONFIG_SYS_HZ 1000
	217
	218	/*
	219	* Stack sizes
	220	*
	221	* The stack sizes are set up in start.S using the settings below
	222	*/
	223	#define CONFIG_STACKSIZE (128 << 10) /* Regular stack */
	224	#ifdef CONFIG_USE_IRQ
	225	#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */
	226	#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */
	227	#endif
	228
	229	/*
	230	* SDRAM Memory Map
	231	* Even though we use two CS all the memory
	232	* is mapped to one contiguous block
	233	*/
	234	#define CONFIG_NR_DRAM_BANKS 1
	235
57b512b2	236	#define CONFIG_SYS_SDRAM_BASE 0x80000000
31bfcf1c SS	237	#define CONFIG_SYS_INIT_RAM_ADDR 0x4030D800
	238	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	239	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	240	CONFIG_SYS_INIT_RAM_SIZE - \
	241	GENERATED_GBL_DATA_SIZE)
57b512b2	242
3e76d62a	243	#endif /* __CONFIG_H */