[people/ms/u-boot.git] / include / configs / omap5912osk.h

/*
 * (C) Copyright 2003
 * Texas Instruments.
 * Kshitij Gupta <kshitij@ti.com>
 * Configuation settings for the TI OMAP Innovator board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM926EJS	1	/* This is an arm926ejs CPU core  */
#define CONFIG_OMAP	1			/* in a TI OMAP core    */
#define CONFIG_OMAP1610	1		/* 5912 is same as 1610  */
#define CONFIG_OSK_OMAP5912	1	/*  a OSK Board  */

#define CONFIG_DISPLAY_CPUINFO	1	/* display cpu info (and speed)	*/
#define CONFIG_DISPLAY_BOARDINFO 1	/* display board info		*/

/* input clock of PLL */
/* the OMAP5912 OSK has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ	12000000

#undef CONFIG_USE_IRQ	/* we don't need IRQ/FIQ stuff */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG      1       /* Required for ramdisk support */

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
/*
*/
#define CONFIG_NET_MULTI
#define CONFIG_LAN91C96
#define CONFIG_LAN91C96_BASE 0x04800300
#define CONFIG_LAN91C96_EXT_PHY

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK	(48000000)	/* can be 12M/32Khz or 48Mhz */
#define CONFIG_SYS_NS16550_COM1	0xfffb0000	/* uart1, bluetooth uart
						on helen */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1	1	/* we use SERIAL 1 on OMAP5912 OSK */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE	115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH


#include <configs/omap1510.h>

#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS	"mem=32M console=ttyS0,115200n8 noinitrd \
				root=/dev/nfs rw nfsroot=157.87.82.48:\
				/home/mwd/myfs/target ip=dhcp"
#define CONFIG_NETMASK	255.255.254.0	/* talk on MY local net */
#define CONFIG_IPADDR	156.117.97.156	/* static IP I currently own */
#define CONFIG_SERVERIP	156.117.97.139	/* current IP of my dev pc */
#define CONFIG_BOOTFILE	"uImage"	/* file to load */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory     */
#define CONFIG_SYS_PROMPT	"OMAP5912 OSK # "	/* Monitor Command Prompt   */
#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size  */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS	16		/* max number of command args   */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x10000000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END	0x12000000	/* 32 MB in DRAM    */

#define CONFIG_SYS_LOAD_ADDR	0x10000000	/* default load address */

/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
 * DPLL1. This time is further subdivided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE	0xFFFEC500	/* use timer 1 */
#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x10000000	/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000	/* 32 MB */

#define PHYS_FLASH_1		0x00000000	/* Flash Bank #1 */
#define PHYS_FLASH_2		0x01000000	/* Flash Bank #2 */

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

#define CONFIG_SYS_MONITOR_BASE       CONFIG_SYS_FLASH_BASE  /* Monitor at beginning of flash */

/*-----------------------------------------------------------------------
 * FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI          1       /* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER   1       /* Use drivers/mtd/cfi_flash.c */

#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }

#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of memory banks */
#define PHYS_FLASH_SIZE	0x02000000	/* 32MB */
#define CONFIG_SYS_MAX_FLASH_SECT	(259)	/* max number of sectors on one chip */

#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE     1       /* Use buffered writes (~10x faster) */
#define CONFIG_SYS_FLASH_PROTECTION   1       /* Use hardware sector protection */

#define CONFIG_SYS_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(20*CONFIG_SYS_HZ)	/* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(20*CONFIG_SYS_HZ)	/* Timeout for Flash Write */

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CONFIG_ENV_IS_IN_FLASH	1
/* addr of environment */
#define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + 0x020000)

#define CONFIG_ENV_SIZE	0x20000	/* Total Size of Environment Sector */
#define CONFIG_ENV_OFFSET	0x20000	/* environment starts here  */

#endif							/* __CONFIG_H */
Commit	Line	Data
1eaeb58e WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments.
	4	* Kshitij Gupta <kshitij@ti.com>
	5	* Configuation settings for the TI OMAP Innovator board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
1eaeb58e WD	29	/*
	30	* High Level Configuration Options
	31	* (easy to change)
	32	*/
	33	#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
	34	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	35	#define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
	36	#define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
	37
6080a0eb SR	38	#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
	39	#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
	40
1eaeb58e WD	41	/* input clock of PLL */
	42	/* the OMAP5912 OSK has 12MHz input clock */
	43	#define CONFIG_SYS_CLK_FREQ 12000000
	44
	45	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	46
	47	#define CONFIG_MISC_INIT_R
	48
	49	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	50	#define CONFIG_SETUP_MEMORY_TAGS 1
6080a0eb	51	#define CONFIG_INITRD_TAG 1 /* Required for ramdisk support */
1eaeb58e WD	52
	53	/*
	54	* Size of malloc() pool
	55	*/
6d0f6bcf JCPV	56	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
6d0f6bcf JCPV	57	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
1eaeb58e WD	58
	59	/*
	60	* Hardware drivers
	61	*/
	62	/*
	63	*/
ac6b362a NM	64	#define CONFIG_NET_MULTI
ac6b362a NM	65	#define CONFIG_LAN91C96
1eaeb58e WD	66	#define CONFIG_LAN91C96_BASE 0x04800300
	67	#define CONFIG_LAN91C96_EXT_PHY
	68
	69	/*
	70	* NS16550 Configuration
	71	*/
6d0f6bcf JCPV	72	#define CONFIG_SYS_NS16550
	73	#define CONFIG_SYS_NS16550_SERIAL
	74	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	75	#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
	76	#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
1eaeb58e WD	77	on helen */
	78
	79	/*
	80	* select serial console configuration
	81	*/
	82	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP5912 OSK */
	83
	84	/* allow to overwrite serial and ethaddr */
	85	#define CONFIG_ENV_OVERWRITE
	86	#define CONFIG_CONS_INDEX 1
	87	#define CONFIG_BAUDRATE 115200
6d0f6bcf	88	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
1eaeb58e	89
a5cb2309 JL	90
	91	/*
	92	* Command line configuration.
	93	*/
	94	#include <config_cmd_default.h>
	95
	96	#define CONFIG_CMD_DHCP
	97
	98
d3b8c1a7 JL	99	/*
	100	* BOOTP options
	101	*/
	102	#define CONFIG_BOOTP_SUBNETMASK
	103	#define CONFIG_BOOTP_GATEWAY
	104	#define CONFIG_BOOTP_HOSTNAME
	105	#define CONFIG_BOOTP_BOOTPATH
	106
1eaeb58e	107
1eaeb58e WD	108	#include <configs/omap1510.h>
	109
	110	#define CONFIG_BOOTDELAY 3
	111	#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
	112	root=/dev/nfs rw nfsroot=157.87.82.48:\
	113	/home/mwd/myfs/target ip=dhcp"
	114	#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
	115	#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
	116	#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
	117	#define CONFIG_BOOTFILE "uImage" /* file to load */
	118
a5cb2309	119	#if defined(CONFIG_CMD_KGDB)
1eaeb58e WD	120	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	121	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	122	#endif
	123
	124	/*
	125	* Miscellaneous configurable options
	126	*/
6d0f6bcf JCPV	127	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	128	#define CONFIG_SYS_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */
	129	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
1eaeb58e	130	/* Print Buffer Size */
6d0f6bcf JCPV	131	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	132	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	133	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
1eaeb58e	134
6d0f6bcf JCPV	135	#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
6d0f6bcf JCPV	136	#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
1eaeb58e	137
6d0f6bcf	138	#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
1eaeb58e WD	139
	140	/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
	141	* DPLL1. This time is further subdivided by a local divisor.
	142	*/
6d0f6bcf	143	#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
81472d89 LM	144	#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
81472d89 LM	145	#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
1eaeb58e WD	146
	147	/*-----------------------------------------------------------------------
	148	* Stack sizes
	149	*
	150	* The stack sizes are set up in start.S using the settings below
	151	*/
	152	#define CONFIG_STACKSIZE (1281024) / regular stack */
	153	#ifdef CONFIG_USE_IRQ
	154	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	155	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	156	#endif
	157
	158	/*-----------------------------------------------------------------------
	159	* Physical Memory Map
	160	*/
	161	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
6080a0eb	162	#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
1eaeb58e WD	163	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
1eaeb58e WD	164
6080a0eb SR	165	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	166	#define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */
	167
6d0f6bcf	168	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
1eaeb58e	169
6d0f6bcf	170	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
1eaeb58e WD	171
1eaeb58e WD	172	/*-----------------------------------------------------------------------
6080a0eb	173	* FLASH driver setup
1eaeb58e	174	*/
6d0f6bcf	175	#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
00b1883a	176	#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
6080a0eb	177
6d0f6bcf	178	#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
6080a0eb	179
6d0f6bcf	180	#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
1eaeb58e	181	#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
6d0f6bcf	182	#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
6080a0eb	183
6d0f6bcf JCPV	184	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
6d0f6bcf JCPV	185	#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
6080a0eb	186
6d0f6bcf	187	#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
1eaeb58e WD	188
1eaeb58e WD	189	/* timeout values are in ticks */
6d0f6bcf JCPV	190	#define CONFIG_SYS_FLASH_ERASE_TOUT (20CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	191	#define CONFIG_SYS_FLASH_WRITE_TOUT (20CONFIG_SYS_HZ) / Timeout for Flash Write */
1eaeb58e	192
6080a0eb SR	193	/*-----------------------------------------------------------------------
	194	* FLASH and environment organization
	195	*/
5a1aceb0	196	#define CONFIG_ENV_IS_IN_FLASH 1
6080a0eb	197	/* addr of environment */
6d0f6bcf	198	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
6080a0eb	199
0e8d1586 JCPV	200	#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
0e8d1586 JCPV	201	#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
1eaeb58e WD	202
1eaeb58e WD	203	#endif /* __CONFIG_H */