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a56bd922 1/*
1eaeb58e 2 * (C) Copyright 2003-2004
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3 * MPC Data Limited (http://www.mpc-data.co.uk)
4 * Dave Peverley <dpeverley at mpc-data.co.uk>
5 *
6 * Configuation settings for the TI OMAP Perseus 2 board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
1eaeb58e 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
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30/* allow to overwrite serial and ethaddr */
31#define CONFIG_ENV_OVERWRITE
32
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33/*
34 * High Level Configuration Options
35 * (easy to change)
36 */
37
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38#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
39#define CONFIG_OMAP 1 /* in a TI OMAP core */
40#define CONFIG_OMAP730 1 /* which is in a 730 */
41#define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */
a56bd922 42
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43/*
44 * Input clock of PLL
45 * The OMAP730 Perseus 2 has 13MHz input clock
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46 */
47
1eaeb58e 48#define CONFIG_SYS_CLK_FREQ 13000000
a56bd922 49
1eaeb58e 50#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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51
52#define CONFIG_MISC_INIT_R
53
1eaeb58e 54#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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55#define CONFIG_SETUP_MEMORY_TAGS 1
56
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57/*
58 * Size of malloc() pool
59 */
60
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61#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
62#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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63
64/*
65 * Hardware drivers
66 */
67
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68#define CONFIG_NET_MULTI
69#define CONFIG_LAN91C96
1eaeb58e 70#define CONFIG_LAN91C96_BASE 0x04000300
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71#define CONFIG_LAN91C96_EXT_PHY
72
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73/*
74 * NS16550 Configuration
75 */
76
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77#define CONFIG_SYS_NS16550
78#define CONFIG_SYS_NS16550_SERIAL
79#define CONFIG_SYS_NS16550_REG_SIZE (1)
80#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
81#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
1eaeb58e 82 * on perseus */
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83
84/*
85 * select serial console configuration
86 */
87
1eaeb58e 88#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */
a56bd922 89
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90#define CONFIG_CONS_INDEX 1
91#define CONFIG_BAUDRATE 115200
6d0f6bcf 92#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
a56bd922 93
a56bd922 94
1eaeb58e 95/*
a5cb2309 96 * Command line configuration.
a56bd922 97 */
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98#include <config_cmd_default.h>
99
100#define CONFIG_CMD_DHCP
101
102
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103/*
104 * BOOTP options
105 */
106#define CONFIG_BOOTP_SUBNETMASK
107#define CONFIG_BOOTP_GATEWAY
108#define CONFIG_BOOTP_HOSTNAME
109#define CONFIG_BOOTP_BOOTPATH
110
a56bd922 111
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112#include <configs/omap730.h>
113#include <configs/h2_p2_dbg_board.h>
114
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115#define CONFIG_BOOTDELAY 3
116#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp"
a56bd922 117
1eaeb58e 118#define CONFIG_LOADADDR 0x10000000
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119
120#define CONFIG_ETHADDR
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121#define CONFIG_NETMASK 255.255.255.0
122#define CONFIG_IPADDR 192.168.0.23
123#define CONFIG_SERVERIP 192.150.0.100
124#define CONFIG_BOOTFILE "uImage" /* File to load */
a56bd922 125
a5cb2309 126#if defined(CONFIG_CMD_KGDB)
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127#define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */
128#define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */
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129#endif
130
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131/*
132 * Miscellaneous configurable options
133 */
134
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135#define CONFIG_SYS_LONGHELP /* undef to save memory */
136#define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
137#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
a56bd922 138/* Print Buffer Size */
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139#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
140#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
a56bd922 142
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143#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
144#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
a56bd922 145
6d0f6bcf 146#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
a56bd922 147
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148/* The OMAP730 has 3 general purpose MPU timers, they can be driven by
149 * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
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150 * local divisor.
151 */
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152#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
153#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
154#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
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155
156/*-----------------------------------------------------------------------
157 * Stack sizes
158 *
159 * The stack sizes are set up in start.S using the settings below
160 */
161
1eaeb58e 162#define CONFIG_STACKSIZE (128*1024) /* regular stack */
a56bd922 163#ifdef CONFIG_USE_IRQ
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164#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
165#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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166#endif
167
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168/*-----------------------------------------------------------------------
169 * Physical Memory Map
170 */
171
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172#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
173#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
174#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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175
176#if defined(CONFIG_CS0_BOOT)
1eaeb58e 177#define PHYS_FLASH_1 0x0C000000
a56bd922 178#elif defined(CONFIG_CS3_BOOT)
1eaeb58e 179#define PHYS_FLASH_1 0x00000000
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180#else
181#error Unknown Boot Chip-Select number
182#endif
183
6d0f6bcf 184#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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185
186/*-----------------------------------------------------------------------
187 * FLASH and environment organization
188 */
189
6d0f6bcf 190#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
1eaeb58e 191#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
6d0f6bcf 192#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
a56bd922 193/* addr of environment */
6d0f6bcf 194#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
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195
196/* timeout values are in ticks */
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197#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
198#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
a56bd922 199
5a1aceb0 200#define CONFIG_ENV_IS_IN_FLASH 1
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201#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
202#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
a56bd922 203
1eaeb58e 204#endif /* ! __CONFIG_H */