]>
Commit | Line | Data |
---|---|---|
b9a1ef21 CK |
1 | /* |
2 | * Copyright (C) 2011 Samsung Electronics | |
3 | * | |
393cb361 | 4 | * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. |
b9a1ef21 | 5 | * |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
b9a1ef21 CK |
7 | */ |
8 | ||
bf7716d6 PW |
9 | #ifndef __CONFIG_ORIGEN_H |
10 | #define __CONFIG_ORIGEN_H | |
11 | ||
4c7bb1d2 | 12 | #include <configs/exynos4-common.h> |
bf7716d6 PW |
13 | |
14 | #define CONFIG_SYS_PROMPT "ORIGEN # " | |
15 | ||
b9a1ef21 CK |
16 | |
17 | /* High Level Configuration Options */ | |
393cb361 | 18 | #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ |
b9a1ef21 CK |
19 | #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ |
20 | ||
b9a1ef21 CK |
21 | #define CONFIG_SYS_DCACHE_OFF 1 |
22 | ||
bf7716d6 PW |
23 | /* ORIGEN has 4 bank of DRAM */ |
24 | #define CONFIG_NR_DRAM_BANKS 4 | |
b9a1ef21 | 25 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
bf7716d6 PW |
26 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
27 | #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ | |
b9a1ef21 | 28 | |
bf7716d6 PW |
29 | /* memtest works on */ |
30 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
31 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) | |
32 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) | |
b9a1ef21 | 33 | |
bf7716d6 | 34 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 |
b9a1ef21 | 35 | |
b9a1ef21 CK |
36 | #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN |
37 | ||
b9a1ef21 | 38 | /* select serial console configuration */ |
bf7716d6 | 39 | #define CONFIG_SERIAL2 |
b9a1ef21 | 40 | #define CONFIG_BAUDRATE 115200 |
b9a1ef21 | 41 | |
bf7716d6 PW |
42 | /* Console configuration */ |
43 | #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
44 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
45 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" | |
643be9c0 | 46 | |
bf7716d6 | 47 | #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ |
b9a1ef21 | 48 | |
bf7716d6 | 49 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
b9a1ef21 | 50 | |
bf7716d6 PW |
51 | /* Power Down Modes */ |
52 | #define S5P_CHECK_SLEEP 0x00000BAD | |
53 | #define S5P_CHECK_DIDLE 0xBAD00000 | |
54 | #define S5P_CHECK_LPA 0xABAD0000 | |
b9a1ef21 | 55 | |
80615006 | 56 | #undef CONFIG_CMD_PING |
b9a1ef21 CK |
57 | #define CONFIG_CMD_ELF |
58 | #define CONFIG_CMD_DHCP | |
7741c8b8 GG |
59 | #define CONFIG_CMD_EXT2 |
60 | #define CONFIG_CMD_FS_GENERIC | |
61 | #define CONFIG_CMD_BOOTZ | |
62 | #define CONFIG_SUPPORT_RAW_INITRD | |
b9a1ef21 CK |
63 | #undef CONFIG_CMD_NET |
64 | #undef CONFIG_CMD_NFS | |
65 | ||
98a48c5d | 66 | /* MMC SPL */ |
98a48c5d | 67 | #define COPY_BL2_FNPTR_ADDR 0x02020030 |
8a00061e IS |
68 | #define CONFIG_SPL_TEXT_BASE 0x02021410 |
69 | ||
7741c8b8 GG |
70 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
71 | "loadaddr=0x40007000\0" \ | |
72 | "rdaddr=0x48000000\0" \ | |
73 | "kerneladdr=0x40007000\0" \ | |
74 | "ramdiskaddr=0x48000000\0" \ | |
75 | "console=ttySAC2,115200n8\0" \ | |
76 | "mmcdev=0\0" \ | |
77 | "bootenv=uEnv.txt\0" \ | |
78 | "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ | |
79 | "importbootenv=echo Importing environment from mmc ...; " \ | |
80 | "env import -t $loadaddr $filesize\0" \ | |
81 | "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ | |
82 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ | |
83 | "source ${loadaddr}\0" | |
84 | #define CONFIG_BOOTCOMMAND \ | |
85 | "if mmc rescan; then " \ | |
86 | "echo SD/MMC found on device ${mmcdev};" \ | |
87 | "if run loadbootenv; then " \ | |
88 | "echo Loaded environment from ${bootenv};" \ | |
89 | "run importbootenv;" \ | |
90 | "fi;" \ | |
91 | "if test -n $uenvcmd; then " \ | |
92 | "echo Running uenvcmd ...;" \ | |
93 | "run uenvcmd;" \ | |
94 | "fi;" \ | |
95 | "if run loadbootscript; then " \ | |
96 | "run bootscript; " \ | |
97 | "fi; " \ | |
98 | "fi;" \ | |
99 | "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " | |
b9a1ef21 | 100 | |
b9a1ef21 CK |
101 | #define CONFIG_IDENT_STRING " for ORIGEN" |
102 | ||
b9a1ef21 CK |
103 | #define CONFIG_CLK_1000_400_200 |
104 | ||
105 | /* MIU (Memory Interleaving Unit) */ | |
106 | #define CONFIG_MIU_2BIT_21_7_INTERLEAVED | |
107 | ||
bf7716d6 | 108 | #define CONFIG_ENV_IS_IN_MMC |
b9a1ef21 CK |
109 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
110 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ | |
111 | #define RESERVE_BLOCK_SIZE (512) | |
112 | #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ | |
113 | #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) | |
b9a1ef21 | 114 | |
643be9c0 RS |
115 | #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" |
116 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) | |
117 | ||
118 | #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 | |
98a48c5d CK |
119 | |
120 | /* U-boot copy size from boot Media to DRAM.*/ | |
121 | #define COPY_BL2_SIZE 0x80000 | |
122 | #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) | |
123 | #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) | |
099e884a | 124 | |
b9a1ef21 | 125 | #endif /* __CONFIG_H */ |