[people/ms/u-boot.git] / include / configs / otc570.h

/*
 * (C) Copyright 2010-2011
 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
 * esd electronic system design gmbh <www.esd.eu>
 *
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian.pop@leadtechdesign.com>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the esd OTC570 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>

/*
 * Warning: changing CONFIG_SYS_TEXT_BASE requires
 * adapting the initial boot program.
 * Since the linker has to swallow that define, we must use a pure
 * hex number here!
 */
#define CONFIG_SYS_TEXT_BASE		0x20002000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* 32.768 kHz crystal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	16000000/* 16.0 MHz crystal */
#define CONFIG_SYS_HZ			1000	/* decrementer freq */

/* Misc CPU related */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOARD_EARLY_INIT_F		/* call board_early_init_f() */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_MISC_INIT_R			/* Call misc_init_r */
#undef	CONFIG_USE_IRQ				/* don't need IRQ/FIQ stuff */

#define CONFIG_DISPLAY_BOARDINFO		/* call checkboard() */
#define CONFIG_DISPLAY_CPUINFO			/* display cpu info and speed */
#define CONFIG_PREBOOT				/* enable preboot variable */

/*
 * Hardware drivers
 */

/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP

/* general purpose I/O */
#define CONFIG_AT91_GPIO

/* Console output */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 19200, 38400, 57600, 9600}

#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK

/* LCD */
#define CONFIG_LCD
#undef CONFIG_SPLASH_SCREEN

#ifdef CONFIG_LCD
# define LCD_BPP			LCD_COLOR8

# ifndef CONFIG_SPLASH_SCREEN
#  define CONFIG_LCD_LOGO
#  define CONFIG_LCD_INFO
#  undef CONFIG_LCD_INFO_BELOW_LOGO
# endif /* CONFIG_SPLASH_SCREEN */

# undef LCD_TEST_PATTERN
# define CONFIG_SYS_WHITE_ON_BLACK
# define CONFIG_ATMEL_LCD
# define CONFIG_SYS_CONSOLE_IS_IN_ENV
# define CONFIG_OTC570_LCD_BASE		(CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
# define CONFIG_CMD_BMP
#endif /* CONFIG_LCD */

/* RTC and I2C stuff */
#define CONFIG_RTC_DS1338
#define CONFIG_SYS_I2C_RTC_ADDR		0x68
#undef CONFIG_HARD_I2C
#define CONFIG_SOFT_I2C
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		0x7F

#ifdef CONFIG_SOFT_I2C
# define CONFIG_I2C_CMD_TREE
# define CONFIG_I2C_MULTI_BUS
/* Configure data and clock pins for pio */
# define I2C_INIT { \
	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
}
# define I2C_SOFT_DECLARATIONS
/* Configure data pin as output */
# define I2C_ACTIVE		at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
/* Configure data pin as input */
# define I2C_TRISTATE		at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
/* Read data pin */
# define I2C_READ		at91_get_pio_value(AT91_PIO_PORTB, 4)
/* Set data pin */
# define I2C_SDA(bit)		at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
/* Set clock pin */
# define I2C_SCL(bit)		at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
# define I2C_DELAY		udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NAND
#define CONFIG_CMD_USB
#define CONFIG_CMD_I2C
#define CONFIG_CMD_DATE

/* LED */
#define CONFIG_AT91_LED

/*
 * SDRAM: 1 bank, min 32, max 128 MB
 * Initialized before u-boot gets started.
 */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000 /* ATMEL_BASE_CS1 */
#define CONFIG_SYS_SDRAM_SIZE		0x04000000

#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x00100000)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01E00000)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x00100000)

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#ifdef CONFIG_SYS_USE_DATAFLASH
# define CONFIG_ATMEL_DATAFLASH_SPI
# define CONFIG_HAS_DATAFLASH
# define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
# define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
# define AT91_SPI_CLK				15000000
# define DATAFLASH_TCSS				(0x1a << 16)
# define DATAFLASH_TCHS				(0x1 << 24)
#endif

/* NOR flash is not populated, disable it */
#define CONFIG_SYS_NO_FLASH

/* NAND flash */
#ifdef CONFIG_CMD_NAND
# define CONFIG_NAND_ATMEL
# define CONFIG_SYS_MAX_NAND_DEVICE		1
# define CONFIG_SYS_NAND_BASE			0x40000000 /* ATMEL_BASE_CS3 */
# define CONFIG_SYS_NAND_DBW_8
# define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
# define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
# define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIO_PORTD, 15
# define CONFIG_SYS_NAND_READY_PIN		AT91_PIO_PORTA, 22
# define CONFIG_SYS_64BIT_VSPRINTF		/* needed for nand_util.c */
#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_MULTI
#define CONFIG_FIT
#define CONFIG_NET_RETRY_COUNT			20
#undef CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00a00000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_FAT

/* CAN */
#define CONFIG_AT91_CAN

/* hw-controller addresses */
#define CONFIG_ET1100_BASE		0x70000000 /* ATMEL_BASE_CS6 */

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env in dataflash on CS0 */
# define CONFIG_ENV_IS_IN_DATAFLASH
# define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
					0x8400)
# define CONFIG_ENV_OFFSET		0x4200
# define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
					CONFIG_ENV_OFFSET)
# define CONFIG_ENV_SIZE		0x4200

#elif CONFIG_SYS_USE_NANDFLASH

/* bootstrap + u-boot + env + linux in nandflash */
# define CONFIG_ENV_IS_IN_NAND		1
# define CONFIG_ENV_OFFSET		0xC0000
# define CONFIG_ENV_SIZE		0x20000

#endif

#define CONFIG_SYS_PROMPT		"=> "
#define CONFIG_SYS_CBSIZE		512
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + \
					128*1024, 0x1000)

#define CONFIG_STACKSIZE		(32 * 1024)	/* regular stack */

#ifdef CONFIG_USE_IRQ
# error CONFIG_USE_IRQ not supported
#endif

#endif
Commit	Line	Data
44d80256	1	/*
a950c818	2	* (C) Copyright 2010-2011
44d80256 DG	3	* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
	4	* esd electronic system design gmbh <www.esd.eu>
	5	*
	6	* (C) Copyright 2007-2008
	7	* Stelian Pop <stelian.pop@leadtechdesign.com>
	8	* Lead Tech Design <www.leadtechdesign.com>
	9	*
	10	* Configuation settings for the esd OTC570 board.
	11	*
	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	28	* MA 02111-1307 USA
	29	*/
	30
	31	#ifndef __CONFIG_H
	32	#define __CONFIG_H
	33
a950c818 DG	34	/*
	35	* SoC must be defined first, before hardware.h is included.
	36	* In this case SoC is defined in boards.cfg.
	37	*/
	38	#include <asm/hardware.h>
	39
	40	/*
	41	* Warning: changing CONFIG_SYS_TEXT_BASE requires
	42	* adapting the initial boot program.
	43	* Since the linker has to swallow that define, we must use a pure
	44	* hex number here!
	45	*/
	46	#define CONFIG_SYS_TEXT_BASE 0x20002000
	47
	48	/* ARM asynchronous clock */
	49	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
9f07dede	50	#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
44d80256	51	#define CONFIG_SYS_HZ 1000 /* decrementer freq */
44d80256	52
a950c818	53	/* Misc CPU related */
44d80256	54	#define CONFIG_SKIP_LOWLEVEL_INIT
44d80256	55	#define CONFIG_ARCH_CPU_INIT
a950c818 DG	56	#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
	57	#define CONFIG_SETUP_MEMORY_TAGS
	58	#define CONFIG_INITRD_TAG
	59	#define CONFIG_SERIAL_TAG
	60	#define CONFIG_REVISION_TAG
	61	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	62	#define CONFIG_MISC_INIT_R /* Call misc_init_r */
	63	#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
	64
	65	#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
	66	#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
	67	#define CONFIG_PREBOOT /* enable preboot variable */
44d80256 DG	68
	69	/*
	70	* Hardware drivers
	71	*/
a950c818 DG	72
	73	/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
	74	#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
	75
	76	/* general purpose I/O */
	77	#define CONFIG_AT91_GPIO
44d80256 DG	78
44d80256 DG	79	/* Console output */
a950c818 DG	80	#define CONFIG_ATMEL_USART
	81	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	82	#define CONFIG_USART_ID ATMEL_ID_SYS
	83	#define CONFIG_BAUDRATE 115200
	84	#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
44d80256 DG	85
44d80256 DG	86	#define CONFIG_BOOTDELAY 3
a950c818	87	#define CONFIG_ZERO_BOOTDELAY_CHECK
44d80256 DG	88
44d80256 DG	89	/* LCD */
a950c818	90	#define CONFIG_LCD
44d80256 DG	91	#undef CONFIG_SPLASH_SCREEN
44d80256 DG	92
a950c818 DG	93	#ifdef CONFIG_LCD
	94	# define LCD_BPP LCD_COLOR8
	95
	96	# ifndef CONFIG_SPLASH_SCREEN
	97	# define CONFIG_LCD_LOGO
	98	# define CONFIG_LCD_INFO
	99	# undef CONFIG_LCD_INFO_BELOW_LOGO
	100	# endif /* CONFIG_SPLASH_SCREEN */
44d80256	101
a950c818 DG	102	# undef LCD_TEST_PATTERN
	103	# define CONFIG_SYS_WHITE_ON_BLACK
	104	# define CONFIG_ATMEL_LCD
	105	# define CONFIG_SYS_CONSOLE_IS_IN_ENV
	106	# define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
	107	# define CONFIG_CMD_BMP
	108	#endif /* CONFIG_LCD */
44d80256 DG	109
44d80256 DG	110	/* RTC and I2C stuff */
a950c818	111	#define CONFIG_RTC_DS1338
44d80256 DG	112	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
44d80256 DG	113	#undef CONFIG_HARD_I2C
a950c818	114	#define CONFIG_SOFT_I2C
44d80256 DG	115	#define CONFIG_SYS_I2C_SPEED 100000
	116	#define CONFIG_SYS_I2C_SLAVE 0x7F
	117
	118	#ifdef CONFIG_SOFT_I2C
a950c818 DG	119	# define CONFIG_I2C_CMD_TREE
a950c818 DG	120	# define CONFIG_I2C_MULTI_BUS
6258b04e	121	/* Configure data and clock pins for pio */
a950c818	122	# define I2C_INIT { \
6258b04e DG	123	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
6258b04e DG	124	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
44d80256	125	}
a950c818	126	# define I2C_SOFT_DECLARATIONS
44d80256	127	/* Configure data pin as output */
a950c818	128	# define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
44d80256	129	/* Configure data pin as input */
a950c818	130	# define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
44d80256	131	/* Read data pin */
a950c818	132	# define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
44d80256	133	/* Set data pin */
a950c818	134	# define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
44d80256	135	/* Set clock pin */
a950c818 DG	136	# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
a950c818 DG	137	# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
44d80256 DG	138	#endif /* CONFIG_SOFT_I2C */
44d80256 DG	139
44d80256 DG	140	/*
	141	* BOOTP options
	142	*/
a950c818 DG	143	#define CONFIG_BOOTP_BOOTFILESIZE
	144	#define CONFIG_BOOTP_BOOTPATH
	145	#define CONFIG_BOOTP_GATEWAY
	146	#define CONFIG_BOOTP_HOSTNAME
44d80256 DG	147
	148	/*
	149	* Command line configuration.
	150	*/
	151	#include <config_cmd_default.h>
44d80256 DG	152	#undef CONFIG_CMD_FPGA
	153	#undef CONFIG_CMD_LOADS
	154	#undef CONFIG_CMD_IMLS
	155
a950c818 DG	156	#define CONFIG_CMD_PING
	157	#define CONFIG_CMD_DHCP
	158	#define CONFIG_CMD_NAND
	159	#define CONFIG_CMD_USB
	160	#define CONFIG_CMD_I2C
	161	#define CONFIG_CMD_DATE
44d80256 DG	162
44d80256 DG	163	/* LED */
a950c818	164	#define CONFIG_AT91_LED
44d80256	165
a950c818 DG	166	/*
	167	* SDRAM: 1 bank, min 32, max 128 MB
	168	* Initialized before u-boot gets started.
	169	*/
	170	#define CONFIG_NR_DRAM_BANKS 1
	171	#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
	172	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	173
	174	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
	175	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
	176	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
	177
	178	/*
	179	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	180	* leaving the correct space for initial global data structure above
	181	* that address while providing maximum stack area below.
	182	*/
	183	#define CONFIG_SYS_INIT_SP_ADDR \
	184	(ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
44d80256 DG	185
44d80256 DG	186	/* DataFlash */
a950c818 DG	187	#ifdef CONFIG_SYS_USE_DATAFLASH
	188	# define CONFIG_ATMEL_DATAFLASH_SPI
	189	# define CONFIG_HAS_DATAFLASH
	190	# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
	191	# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
	192	# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
	193	# define AT91_SPI_CLK 15000000
	194	# define DATAFLASH_TCSS (0x1a << 16)
	195	# define DATAFLASH_TCHS (0x1 << 24)
	196	#endif
44d80256 DG	197
44d80256 DG	198	/* NOR flash is not populated, disable it */
a950c818	199	#define CONFIG_SYS_NO_FLASH
44d80256 DG	200
	201	/* NAND flash */
	202	#ifdef CONFIG_CMD_NAND
a950c818 DG	203	# define CONFIG_NAND_ATMEL
	204	# define CONFIG_SYS_MAX_NAND_DEVICE 1
	205	# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
	206	# define CONFIG_SYS_NAND_DBW_8
	207	# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	208	# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	209	# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
	210	# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
	211	# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
44d80256 DG	212	#endif
	213
	214	/* Ethernet */
a950c818 DG	215	#define CONFIG_MACB
	216	#define CONFIG_RMII
	217	#define CONFIG_NET_MULTI
	218	#define CONFIG_FIT
44d80256 DG	219	#define CONFIG_NET_RETRY_COUNT 20
	220	#undef CONFIG_RESET_PHY_R
	221
	222	/* USB */
	223	#define CONFIG_USB_ATMEL
a950c818 DG	224	#define CONFIG_USB_OHCI_NEW
	225	#define CONFIG_DOS_PARTITION
	226	#define CONFIG_SYS_USB_OHCI_CPU_INIT
44d80256 DG	227	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
	228	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
	229	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
a950c818 DG	230	#define CONFIG_USB_STORAGE
a950c818 DG	231	#define CONFIG_CMD_FAT
44d80256 DG	232
44d80256 DG	233	/* CAN */
a950c818	234	#define CONFIG_AT91_CAN
44d80256 DG	235
44d80256 DG	236	/* hw-controller addresses */
a950c818 DG	237	#define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
	238
	239	#ifdef CONFIG_SYS_USE_DATAFLASH
44d80256 DG	240
44d80256 DG	241	/* bootstrap + u-boot + env in dataflash on CS0 */
a950c818 DG	242	# define CONFIG_ENV_IS_IN_DATAFLASH
a950c818 DG	243	# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
44d80256	244	0x8400)
a950c818 DG	245	# define CONFIG_ENV_OFFSET 0x4200
a950c818 DG	246	# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
44d80256	247	CONFIG_ENV_OFFSET)
a950c818	248	# define CONFIG_ENV_SIZE 0x4200
44d80256	249
a950c818 DG	250	#elif CONFIG_SYS_USE_NANDFLASH
	251
	252	/* bootstrap + u-boot + env + linux in nandflash */
	253	# define CONFIG_ENV_IS_IN_NAND 1
	254	# define CONFIG_ENV_OFFSET 0xC0000
	255	# define CONFIG_ENV_SIZE 0x20000
	256
	257	#endif
44d80256 DG	258
44d80256 DG	259	#define CONFIG_SYS_PROMPT "=> "
a950c818	260	#define CONFIG_SYS_CBSIZE 512
44d80256 DG	261	#define CONFIG_SYS_MAXARGS 16
	262	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	263	sizeof(CONFIG_SYS_PROMPT) + 16)
a950c818 DG	264	#define CONFIG_SYS_LONGHELP
a950c818 DG	265	#define CONFIG_CMDLINE_EDITING
44d80256 DG	266
	267	/*
	268	* Size of malloc() pool
	269	*/
	270	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
	271	128*1024, 0x1000)
44d80256 DG	272
	273	#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
	274
	275	#ifdef CONFIG_USE_IRQ
a950c818	276	# error CONFIG_USE_IRQ not supported
44d80256 DG	277	#endif
	278
	279	#endif