[people/ms/u-boot.git] / include / configs / otc570.h

/*
 * (C) Copyright 2010
 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
 * esd electronic system design gmbh <www.esd.eu>
 *
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian.pop@leadtechdesign.com>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the esd OTC570 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* Common stuff */
#define CONFIG_OTC570			1	/* Board is esd OTC570 */
#define CONFIG_ARM926EJS		1	/* This is an ARM926EJS Core */
#define CONFIG_AT91SAM9263		1	/* It's an AT91SAM9263 SoC */
#define CONFIG_SYS_AT91_MAIN_CLOCK	16000000/* 16.0 MHz crystal */
#define CONFIG_SYS_HZ			1000	/* decrementer freq */
#define CONFIG_DISPLAY_BOARDINFO	1
#define CONFIG_DISPLAY_CPUINFO		1	/* display cpu info and speed */
#define CONFIG_PREBOOT				/* enable preboot variable */
#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_SERIAL_TAG		1
#define CONFIG_REVISION_TAG		1
#undef CONFIG_USE_IRQ				/* don't need IRQ/FIQ stuff */

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_MISC_INIT_R		1	/* Call misc_init_r */

#define CONFIG_ARCH_CPU_INIT

/*
 * Hardware drivers
 */
#define CONFIG_AT91_GPIO		1

/* Console output */
#define CONFIG_ATMEL_USART		1
#undef CONFIG_USART0
#undef CONFIG_USART1
#undef CONFIG_USART2
#define CONFIG_USART3			1	/* USART 3 is DBGU */

#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK	1

/* LCD */
#define CONFIG_LCD			1
#define LCD_BPP				LCD_COLOR8

#undef CONFIG_SPLASH_SCREEN

#ifndef CONFIG_SPLASH_SCREEN
#define CONFIG_LCD_LOGO			1
#define CONFIG_LCD_INFO			1
#undef CONFIG_LCD_INFO_BELOW_LOGO
#endif /* CONFIG_SPLASH_SCREEN */

#undef LCD_TEST_PATTERN
#define CONFIG_SYS_WHITE_ON_BLACK	1
#define CONFIG_ATMEL_LCD		1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
#define CONFIG_OTC570_LCD_BASE		0x23E00000	/* LCD is in SDRAM */
#define CONFIG_CMD_BMP			1

/* RTC and I2C stuff */
#define CONFIG_RTC_DS1338		1
#define CONFIG_SYS_I2C_RTC_ADDR		0x68
#undef CONFIG_HARD_I2C
#define CONFIG_SOFT_I2C			1
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		0x7F

#ifdef CONFIG_SOFT_I2C
#define CONFIG_I2C_CMD_TREE		1
#define CONFIG_I2C_MULTI_BUS		1
/* Configure data and clock pins for pio */
#define I2C_INIT { \
	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
}
#define I2C_SOFT_DECLARATIONS
/* Configure data pin as output */
#define I2C_ACTIVE		at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
/* Configure data pin as input */
#define I2C_TRISTATE		at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
/* Read data pin */
#define I2C_READ		at91_get_pio_value(AT91_PIO_PORTB, 4)
/* Set data pin */
#define I2C_SDA(bit)		at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
/* Set clock pin */
#define I2C_SCL(bit)		at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
#define I2C_DELAY		udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */

#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK	1

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE	1
#define CONFIG_BOOTP_BOOTPATH		1
#define CONFIG_BOOTP_GATEWAY		1
#define CONFIG_BOOTP_HOSTNAME		1

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS

#define CONFIG_CMD_PING			1
#define CONFIG_CMD_DHCP			1
#define CONFIG_CMD_NAND			1
#define CONFIG_CMD_USB			1
#define CONFIG_CMD_I2C			1
#define CONFIG_CMD_DATE			1

/* LED */
#define CONFIG_AT91_LED			1

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS			1
#define PHYS_SDRAM				0x20000000

/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH			1
#define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define AT91_SPI_CLK				15000000
#define DATAFLASH_TCSS				(0x1a << 16)
#define DATAFLASH_TCHS				(0x1 << 24)

/* NOR flash is not populated, disable it */
#define CONFIG_SYS_NO_FLASH			1

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			0x40000000
#define CONFIG_SYS_NAND_DBW_8			1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIO_PORTD, 15
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIO_PORTA, 22
#define CONFIG_SYS_64BIT_VSPRINTF		/* needed for nand_util.c */
#endif

/* Ethernet */
#define CONFIG_MACB				1
#define CONFIG_RMII				1
#define CONFIG_NET_MULTI			1
#define CONFIG_NET_RETRY_COUNT			20
#undef CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW			1
#define CONFIG_DOS_PARTITION			1
#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00a00000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE			1
#define CONFIG_CMD_FAT				1

#define CONFIG_SYS_LOAD_ADDR			0x22000000 /* load address */

#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#define CONFIG_SYS_USE_DATAFLASH		1
#undef CONFIG_SYS_USE_NANDFLASH

/* CAN */
#define CONFIG_AT91_CAN				1

/* hw-controller addresses */
#define CONFIG_ET1100_BASE			0x70000000

/* bootstrap + u-boot + env in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH	1
#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
					0x8400)
#define CONFIG_ENV_OFFSET		0x4200
#define CONFIG_ENV_ADDR			(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
					CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE			0x4200

#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }

#define CONFIG_SYS_PROMPT		"=> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING		1

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + \
					128*1024, 0x1000)

#define CONFIG_STACKSIZE		(32 * 1024)	/* regular stack */

#ifdef CONFIG_USE_IRQ
#error CONFIG_USE_IRQ not supported
#endif

#endif
Commit	Line	Data
44d80256 DG	1	/*
	2	* (C) Copyright 2010
	3	* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
	4	* esd electronic system design gmbh <www.esd.eu>
	5	*
	6	* (C) Copyright 2007-2008
	7	* Stelian Pop <stelian.pop@leadtechdesign.com>
	8	* Lead Tech Design <www.leadtechdesign.com>
	9	*
	10	* Configuation settings for the esd OTC570 board.
	11	*
	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	28	* MA 02111-1307 USA
	29	*/
	30
	31	#ifndef __CONFIG_H
	32	#define __CONFIG_H
	33
	34	/* Common stuff */
	35	#define CONFIG_OTC570 1 /* Board is esd OTC570 */
	36	#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
	37	#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */
9f07dede	38	#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
44d80256 DG	39	#define CONFIG_SYS_HZ 1000 /* decrementer freq */
	40	#define CONFIG_DISPLAY_BOARDINFO 1
	41	#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */
	42	#define CONFIG_PREBOOT /* enable preboot variable */
	43	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	44	#define CONFIG_SETUP_MEMORY_TAGS 1
	45	#define CONFIG_INITRD_TAG 1
	46	#define CONFIG_SERIAL_TAG 1
	47	#define CONFIG_REVISION_TAG 1
	48	#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
	49
	50	#define CONFIG_SKIP_LOWLEVEL_INIT
	51	#define CONFIG_SKIP_RELOCATE_UBOOT
	52	#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
	53
	54	#define CONFIG_ARCH_CPU_INIT
	55
	56	/*
	57	* Hardware drivers
	58	*/
6258b04e	59	#define CONFIG_AT91_GPIO 1
44d80256 DG	60
	61	/* Console output */
	62	#define CONFIG_ATMEL_USART 1
	63	#undef CONFIG_USART0
	64	#undef CONFIG_USART1
	65	#undef CONFIG_USART2
	66	#define CONFIG_USART3 1 /* USART 3 is DBGU */
	67
	68	#define CONFIG_BOOTDELAY 3
	69	#define CONFIG_ZERO_BOOTDELAY_CHECK 1
	70
	71	/* LCD */
	72	#define CONFIG_LCD 1
	73	#define LCD_BPP LCD_COLOR8
	74
	75	#undef CONFIG_SPLASH_SCREEN
	76
	77	#ifndef CONFIG_SPLASH_SCREEN
	78	#define CONFIG_LCD_LOGO 1
	79	#define CONFIG_LCD_INFO 1
	80	#undef CONFIG_LCD_INFO_BELOW_LOGO
	81	#endif /* CONFIG_SPLASH_SCREEN */
	82
	83	#undef LCD_TEST_PATTERN
	84	#define CONFIG_SYS_WHITE_ON_BLACK 1
	85	#define CONFIG_ATMEL_LCD 1
	86	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
	87	#define CONFIG_OTC570_LCD_BASE 0x23E00000 /* LCD is in SDRAM */
	88	#define CONFIG_CMD_BMP 1
	89
	90	/* RTC and I2C stuff */
	91	#define CONFIG_RTC_DS1338 1
	92	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
	93	#undef CONFIG_HARD_I2C
	94	#define CONFIG_SOFT_I2C 1
	95	#define CONFIG_SYS_I2C_SPEED 100000
	96	#define CONFIG_SYS_I2C_SLAVE 0x7F
	97
	98	#ifdef CONFIG_SOFT_I2C
	99	#define CONFIG_I2C_CMD_TREE 1
	100	#define CONFIG_I2C_MULTI_BUS 1
6258b04e	101	/* Configure data and clock pins for pio */
44d80256	102	#define I2C_INIT { \
6258b04e DG	103	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
6258b04e DG	104	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
44d80256	105	}
fb508b8b	106	#define I2C_SOFT_DECLARATIONS
44d80256	107	/* Configure data pin as output */
6258b04e	108	#define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
44d80256	109	/* Configure data pin as input */
6258b04e	110	#define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
44d80256	111	/* Read data pin */
6258b04e	112	#define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
44d80256	113	/* Set data pin */
6258b04e	114	#define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
44d80256	115	/* Set clock pin */
6258b04e DG	116	#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
6258b04e DG	117	#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
44d80256 DG	118	#endif /* CONFIG_SOFT_I2C */
	119
	120	#define CONFIG_BOOTDELAY 3
	121	#define CONFIG_ZERO_BOOTDELAY_CHECK 1
	122
	123	/*
	124	* BOOTP options
	125	*/
	126	#define CONFIG_BOOTP_BOOTFILESIZE 1
	127	#define CONFIG_BOOTP_BOOTPATH 1
	128	#define CONFIG_BOOTP_GATEWAY 1
	129	#define CONFIG_BOOTP_HOSTNAME 1
	130
	131	/*
	132	* Command line configuration.
	133	*/
	134	#include <config_cmd_default.h>
44d80256 DG	135	#undef CONFIG_CMD_FPGA
	136	#undef CONFIG_CMD_LOADS
	137	#undef CONFIG_CMD_IMLS
	138
	139	#define CONFIG_CMD_PING 1
	140	#define CONFIG_CMD_DHCP 1
	141	#define CONFIG_CMD_NAND 1
	142	#define CONFIG_CMD_USB 1
	143	#define CONFIG_CMD_I2C 1
	144	#define CONFIG_CMD_DATE 1
	145
	146	/* LED */
	147	#define CONFIG_AT91_LED 1
	148
	149	/* SDRAM */
	150	#define CONFIG_NR_DRAM_BANKS 1
	151	#define PHYS_SDRAM 0x20000000
	152
	153	/* DataFlash */
	154	#define CONFIG_ATMEL_DATAFLASH_SPI
	155	#define CONFIG_HAS_DATAFLASH 1
	156	#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
	157	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
	158	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
	159	#define AT91_SPI_CLK 15000000
	160	#define DATAFLASH_TCSS (0x1a << 16)
	161	#define DATAFLASH_TCHS (0x1 << 24)
	162
	163	/* NOR flash is not populated, disable it */
	164	#define CONFIG_SYS_NO_FLASH 1
	165
	166	/* NAND flash */
	167	#ifdef CONFIG_CMD_NAND
	168	#define CONFIG_NAND_ATMEL
	169	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	170	#define CONFIG_SYS_NAND_BASE 0x40000000
	171	#define CONFIG_SYS_NAND_DBW_8 1
	172	/* our ALE is AD21 */
	173	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	174	/* our CLE is AD22 */
	175	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
6258b04e DG	176	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
6258b04e DG	177	#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
44d80256 DG	178	#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
	179	#endif
	180
	181	/* Ethernet */
	182	#define CONFIG_MACB 1
	183	#define CONFIG_RMII 1
	184	#define CONFIG_NET_MULTI 1
	185	#define CONFIG_NET_RETRY_COUNT 20
	186	#undef CONFIG_RESET_PHY_R
	187
	188	/* USB */
	189	#define CONFIG_USB_ATMEL
	190	#define CONFIG_USB_OHCI_NEW 1
	191	#define CONFIG_DOS_PARTITION 1
	192	#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
	193	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
	194	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
	195	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
	196	#define CONFIG_USB_STORAGE 1
	197	#define CONFIG_CMD_FAT 1
	198
	199	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	200
	201	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
	202	#define CONFIG_SYS_MEMTEST_END 0x23e00000
	203
	204	#define CONFIG_SYS_USE_DATAFLASH 1
	205	#undef CONFIG_SYS_USE_NANDFLASH
	206
	207	/* CAN */
	208	#define CONFIG_AT91_CAN 1
	209
	210	/* hw-controller addresses */
	211	#define CONFIG_ET1100_BASE 0x70000000
	212
	213	/* bootstrap + u-boot + env in dataflash on CS0 */
	214	#define CONFIG_ENV_IS_IN_DATAFLASH 1
	215	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
	216	0x8400)
	217	#define CONFIG_ENV_OFFSET 0x4200
	218	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
	219	CONFIG_ENV_OFFSET)
	220	#define CONFIG_ENV_SIZE 0x4200
	221
	222	#define CONFIG_BAUDRATE 115200
	223	#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
	224
	225	#define CONFIG_SYS_PROMPT "=> "
	226	#define CONFIG_SYS_CBSIZE 256
	227	#define CONFIG_SYS_MAXARGS 16
	228	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	229	sizeof(CONFIG_SYS_PROMPT) + 16)
	230	#define CONFIG_SYS_LONGHELP 1
	231	#define CONFIG_CMDLINE_EDITING 1
	232
	233	/*
	234	* Size of malloc() pool
	235	*/
	236	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
	237	128*1024, 0x1000)
44d80256 DG	238
	239	#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
	240
	241	#ifdef CONFIG_USE_IRQ
	242	#error CONFIG_USE_IRQ not supported
	243	#endif
	244
	245	#endif