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1c1b7c37 LP |
1 | /* |
2 | * pcm051.h | |
3 | * | |
4 | * Phytec phyCORE-AM335x (pcm051) boards information header | |
5 | * | |
6 | * Copyright (C) 2013 Lemonage Software GmbH | |
7 | * Author Lars Poeschel <poeschel@lemonage.de> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation version 2. | |
12 | * | |
13 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
14 | * kind, whether express or implied; without even the implied warranty | |
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | */ | |
18 | ||
19 | #ifndef __CONFIG_PCM051_H | |
20 | #define __CONFIG_PCM051_H | |
21 | ||
22 | #define CONFIG_AM33XX | |
4a0eb757 | 23 | #define CONFIG_OMAP |
806d2792 | 24 | #define CONFIG_OMAP_COMMON |
1c1b7c37 | 25 | |
98f92001 | 26 | #include <asm/arch/omap.h> |
1c1b7c37 | 27 | |
1c1b7c37 LP |
28 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
29 | #define CONFIG_SYS_MALLOC_LEN (1024 << 10) | |
30 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
31 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
32 | #define CONFIG_SYS_PROMPT "U-Boot# " | |
33 | #define CONFIG_SYS_NO_FLASH | |
34 | #define MACH_TYPE_PCM051 4144 /* Until the next sync */ | |
35 | #define CONFIG_MACH_TYPE MACH_TYPE_PCM051 | |
36 | ||
37 | #define CONFIG_OF_LIBFDT | |
38 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
39 | #define CONFIG_SETUP_MEMORY_TAGS | |
40 | #define CONFIG_INITRD_TAG | |
41 | ||
42 | /* commands to include */ | |
43 | #include <config_cmd_default.h> | |
44 | ||
45 | #define CONFIG_CMD_ASKENV | |
46 | #define CONFIG_VERSION_VARIABLE | |
47 | ||
48 | /* set to negative value for no autoboot */ | |
49 | #define CONFIG_BOOTDELAY 1 | |
50 | #define CONFIG_ENV_VARS_UBOOT_CONFIG | |
51 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
52 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
53 | "loadaddr=0x80007fc0\0" \ | |
54 | "fdtaddr=0x80000000\0" \ | |
55 | "rdaddr=0x81000000\0" \ | |
56 | "bootfile=uImage\0" \ | |
57 | "fdtfile=pcm051.dtb\0" \ | |
58 | "console=ttyO0,115200n8\0" \ | |
59 | "optargs=\0" \ | |
60 | "mmcdev=0\0" \ | |
61 | "mmcroot=/dev/mmcblk0p2 ro\0" \ | |
62 | "mmcrootfstype=ext4 rootwait\0" \ | |
63 | "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ | |
64 | "ramrootfstype=ext2\0" \ | |
65 | "mmcargs=setenv bootargs console=${console} " \ | |
66 | "${optargs} " \ | |
67 | "root=${mmcroot} " \ | |
68 | "rootfstype=${mmcrootfstype}\0" \ | |
69 | "bootenv=uEnv.txt\0" \ | |
70 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ | |
71 | "importbootenv=echo Importing environment from mmc ...; " \ | |
72 | "env import -t $loadaddr $filesize\0" \ | |
73 | "ramargs=setenv bootargs console=${console} " \ | |
74 | "${optargs} " \ | |
75 | "root=${ramroot} " \ | |
76 | "rootfstype=${ramrootfstype}\0" \ | |
77 | "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ | |
78 | "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ | |
79 | "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ | |
80 | "mmcboot=echo Booting from mmc ...; " \ | |
81 | "run mmcargs; " \ | |
82 | "bootm ${loadaddr}\0" \ | |
83 | "ramboot=echo Booting from ramdisk ...; " \ | |
84 | "run ramargs; " \ | |
85 | "bootm ${loadaddr}\0" \ | |
86 | ||
87 | #define CONFIG_BOOTCOMMAND \ | |
88 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
89 | "echo SD/MMC found on device ${mmcdev};" \ | |
90 | "if run loadbootenv; then " \ | |
91 | "echo Loaded environment from ${bootenv};" \ | |
92 | "run importbootenv;" \ | |
93 | "fi;" \ | |
94 | "if test -n $uenvcmd; then " \ | |
95 | "echo Running uenvcmd ...;" \ | |
96 | "run uenvcmd;" \ | |
97 | "fi;" \ | |
98 | "if run loaduimage; then " \ | |
99 | "run mmcboot;" \ | |
100 | "fi;" \ | |
101 | "fi;" \ | |
102 | ||
103 | /* Clock Defines */ | |
104 | #define V_OSCK 25000000 /* Clock output from T2 */ | |
105 | #define V_SCLK (V_OSCK) | |
106 | ||
107 | #define CONFIG_CMD_ECHO | |
108 | ||
109 | /* max number of command args */ | |
110 | #define CONFIG_SYS_MAXARGS 16 | |
111 | ||
112 | /* Console I/O Buffer Size */ | |
113 | #define CONFIG_SYS_CBSIZE 512 | |
114 | ||
115 | /* Print Buffer Size */ | |
116 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
117 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
118 | ||
119 | /* Boot Argument Buffer Size */ | |
120 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
121 | ||
122 | /* | |
123 | * memtest works on 8 MB in DRAM after skipping 32MB from | |
124 | * start addr of ram disk | |
125 | */ | |
73feefdc | 126 | #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (64 << 20)) |
1c1b7c37 LP |
127 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ |
128 | + (8 * 1024 * 1024)) | |
129 | ||
130 | #define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */ | |
1c1b7c37 LP |
131 | |
132 | #define CONFIG_MMC | |
133 | #define CONFIG_GENERIC_MMC | |
134 | #define CONFIG_OMAP_HSMMC | |
135 | #define CONFIG_CMD_MMC | |
136 | #define CONFIG_DOS_PARTITION | |
137 | #define CONFIG_CMD_FAT | |
138 | #define CONFIG_CMD_EXT2 | |
139 | ||
140 | #define CONFIG_SPI | |
141 | #define CONFIG_OMAP3_SPI | |
142 | #define CONFIG_MTD_DEVICE | |
143 | #define CONFIG_SPI_FLASH | |
144 | #define CONFIG_SPI_FLASH_WINBOND | |
145 | #define CONFIG_CMD_SF | |
146 | #define CONFIG_SF_DEFAULT_SPEED 24000000 | |
147 | ||
148 | /* Physical Memory Map */ | |
149 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
1c1b7c37 LP |
150 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */ |
151 | ||
73feefdc | 152 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
1c1b7c37 LP |
153 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ |
154 | GENERATED_GBL_DATA_SIZE) | |
155 | /* Platform/Board specific defs */ | |
156 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ | |
157 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
1c1b7c37 LP |
158 | |
159 | #define CONFIG_CONS_INDEX 1 | |
160 | /* NS16550 Configuration */ | |
161 | #define CONFIG_SYS_NS16550 | |
162 | #define CONFIG_SYS_NS16550_SERIAL | |
1c1b7c37 LP |
163 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
164 | #define CONFIG_SYS_NS16550_CLK (48000000) | |
165 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
166 | #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ | |
167 | #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ | |
168 | #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ | |
169 | #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ | |
170 | #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ | |
171 | ||
172 | /* I2C Configuration */ | |
173 | #define CONFIG_I2C | |
174 | #define CONFIG_CMD_I2C | |
6789e84e HS |
175 | #define CONFIG_SYS_I2C |
176 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 | |
177 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
178 | #define CONFIG_SYS_I2C_OMAP24XX | |
1c1b7c37 LP |
179 | #define CONFIG_CMD_EEPROM |
180 | #define CONFIG_ENV_EEPROM_IS_ON_I2C | |
181 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ | |
182 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
183 | #define CONFIG_SYS_I2C_MULTI_EEPROMS | |
184 | ||
185 | #define CONFIG_OMAP_GPIO | |
186 | ||
187 | #define CONFIG_BAUDRATE 115200 | |
188 | #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ | |
189 | 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } | |
190 | ||
47c6ea07 S |
191 | /* CPU */ |
192 | #define CONFIG_ARCH_CPU_INIT | |
193 | ||
1c1b7c37 LP |
194 | #define CONFIG_ENV_OVERWRITE |
195 | #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
196 | ||
197 | #define CONFIG_ENV_IS_NOWHERE | |
198 | ||
199 | /* Defines for SPL */ | |
200 | #define CONFIG_SPL | |
201 | #define CONFIG_SPL_FRAMEWORK | |
52f7d844 | 202 | #define CONFIG_SPL_BOARD_INIT |
320d9746 | 203 | /* |
edfcf85a | 204 | * Place the image at the start of the ROM defined image space. |
320d9746 TR |
205 | * We limit our size to the ROM-defined downloaded image area, and use the |
206 | * rest of the space for stack. | |
207 | */ | |
edfcf85a | 208 | #define CONFIG_SPL_TEXT_BASE 0x402F0400 |
320d9746 | 209 | #define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) |
1c1b7c37 LP |
210 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR |
211 | ||
212 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 | |
213 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
214 | ||
215 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
216 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
217 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
218 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
219 | #define CONFIG_SPL_MMC_SUPPORT | |
220 | #define CONFIG_SPL_FAT_SUPPORT | |
221 | #define CONFIG_SPL_I2C_SUPPORT | |
222 | ||
223 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
224 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
225 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
226 | #define CONFIG_SPL_SERIAL_SUPPORT | |
227 | #define CONFIG_SPL_GPIO_SUPPORT | |
228 | #define CONFIG_SPL_YMODEM_SUPPORT | |
229 | #define CONFIG_SPL_NET_SUPPORT | |
ba1bee43 | 230 | #define CONFIG_SPL_ENV_SUPPORT |
1c1b7c37 LP |
231 | #define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL" |
232 | #define CONFIG_SPL_ETH_SUPPORT | |
233 | #define CONFIG_SPL_SPI_SUPPORT | |
234 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
235 | #define CONFIG_SPL_SPI_LOAD | |
236 | #define CONFIG_SPL_SPI_BUS 0 | |
237 | #define CONFIG_SPL_SPI_CS 0 | |
238 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 | |
239 | #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 | |
65cdd643 | 240 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" |
1c1b7c37 LP |
241 | |
242 | /* | |
243 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
244 | * 64 bytes before this address should be set aside for u-boot.img's | |
245 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
246 | * other needs. | |
247 | */ | |
248 | #define CONFIG_SYS_TEXT_BASE 0x80800000 | |
249 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
250 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
251 | ||
252 | /* Since SPL did pll and ddr initialization for us, | |
253 | * we don't need to do it twice. | |
254 | */ | |
255 | #ifndef CONFIG_SPL_BUILD | |
256 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
257 | #endif | |
258 | ||
259 | /* | |
260 | * USB configuration | |
261 | */ | |
262 | #define CONFIG_USB_MUSB_DSPS | |
263 | #define CONFIG_ARCH_MISC_INIT | |
264 | #define CONFIG_MUSB_GADGET | |
265 | #define CONFIG_MUSB_PIO_ONLY | |
266 | #define CONFIG_USB_GADGET_DUALSPEED | |
267 | #define CONFIG_MUSB_HOST | |
268 | #define CONFIG_AM335X_USB0 | |
269 | #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL | |
270 | #define CONFIG_AM335X_USB1 | |
271 | #define CONFIG_AM335X_USB1_MODE MUSB_HOST | |
272 | ||
273 | #ifdef CONFIG_MUSB_HOST | |
274 | #define CONFIG_CMD_USB | |
275 | #define CONFIG_USB_STORAGE | |
276 | #endif | |
277 | ||
278 | #ifdef CONFIG_MUSB_GADGET | |
279 | #define CONFIG_USB_ETHER | |
280 | #define CONFIG_USB_ETH_RNDIS | |
281 | #endif /* CONFIG_MUSB_GADGET */ | |
282 | ||
283 | /* Unsupported features */ | |
284 | #undef CONFIG_USE_IRQ | |
285 | ||
286 | #define CONFIG_CMD_NET | |
287 | #define CONFIG_CMD_DHCP | |
288 | #define CONFIG_CMD_PING | |
289 | #define CONFIG_DRIVER_TI_CPSW | |
290 | #define CONFIG_MII | |
1c1b7c37 LP |
291 | #define CONFIG_BOOTP_DNS |
292 | #define CONFIG_BOOTP_DNS2 | |
293 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
294 | #define CONFIG_BOOTP_GATEWAY | |
295 | #define CONFIG_BOOTP_SUBNETMASK | |
296 | #define CONFIG_NET_RETRY_COUNT 10 | |
297 | #define CONFIG_NET_MULTI | |
298 | #define CONFIG_PHY_GIGE | |
299 | #define CONFIG_PHYLIB | |
300 | #define CONFIG_PHY_ADDR 0 | |
301 | #define CONFIG_PHY_SMSC | |
302 | ||
303 | #endif /* ! __CONFIG_PCM051_H */ |