[people/ms/u-boot.git] / include / configs / pcm051.h

/*
 * pcm051.h
 *
 * Phytec phyCORE-AM335x (pcm051) boards information header
 *
 * Copyright (C) 2013 Lemonage Software GmbH
 * Author Lars Poeschel <poeschel@lemonage.de>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __CONFIG_PCM051_H
#define __CONFIG_PCM051_H

#define CONFIG_AM33XX
#define CONFIG_OMAP

#include <asm/arch/omap.h>

#define CONFIG_DMA_COHERENT
#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)

#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
#define CONFIG_SYS_PROMPT		"U-Boot# "
#define CONFIG_SYS_NO_FLASH
#define MACH_TYPE_PCM051		4144	/* Until the next sync */
#define CONFIG_MACH_TYPE		MACH_TYPE_PCM051

#define CONFIG_OF_LIBFDT
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/* commands to include */
#include <config_cmd_default.h>

#define CONFIG_CMD_ASKENV
#define CONFIG_VERSION_VARIABLE

/* set to negative value for no autoboot */
#define CONFIG_BOOTDELAY		1
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x80007fc0\0" \
	"fdtaddr=0x80000000\0" \
	"rdaddr=0x81000000\0" \
	"bootfile=uImage\0" \
	"fdtfile=pcm051.dtb\0" \
	"console=ttyO0,115200n8\0" \
	"optargs=\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 ro\0" \
	"mmcrootfstype=ext4 rootwait\0" \
	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
	"ramrootfstype=ext2\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"bootenv=uEnv.txt\0" \
	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t $loadaddr $filesize\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"ramboot=echo Booting from ramdisk ...; " \
		"run ramargs; " \
		"bootm ${loadaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"echo SD/MMC found on device ${mmcdev};" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loaduimage; then " \
			"run mmcboot;" \
		"fi;" \
	"fi;" \

/* Clock Defines */
#define V_OSCK				25000000  /* Clock output from T2 */
#define V_SCLK				(V_OSCK)

#define CONFIG_CMD_ECHO

/* max number of command args */
#define CONFIG_SYS_MAXARGS		16

/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		512

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
					+ sizeof(CONFIG_SYS_PROMPT) + 16)

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/*
 * memtest works on 8 MB in DRAM after skipping 32MB from
 * start addr of ram disk
 */
#define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
					+ (8 * 1024 * 1024))

#define CONFIG_SYS_LOAD_ADDR		0x80007fc0 /* Default load address */

#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_OMAP_HSMMC
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2

#define CONFIG_SPI
#define CONFIG_OMAP3_SPI
#define CONFIG_MTD_DEVICE
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED		24000000

 /* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 19)	/* 512MiB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
						GENERATED_GBL_DATA_SIZE)
 /* Platform/Board specific defs */
#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ			1000	/* 1ms clock */

#define CONFIG_CONS_INDEX		1
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		(48000000)
#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
#define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
#define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
#define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
#define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */

/* I2C Configuration */
#define CONFIG_I2C
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP24XX_I2C
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
#define CONFIG_SYS_I2C_MULTI_EEPROMS

#define CONFIG_OMAP_GPIO

#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }

/* CPU */
#define CONFIG_ARCH_CPU_INIT

#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET

#define CONFIG_ENV_IS_NOWHERE

/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
/*
 * Place the image at the start of the ROM defined image space.
 * We limit our size to the ROM-defined downloaded image area, and use the
 * rest of the space for stack.
 */
#define CONFIG_SPL_TEXT_BASE		0x402F0400
#define CONFIG_SPL_MAX_SIZE		(0x4030C000 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR

#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */

#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_NET_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NET_VCI_STRING	"pcm051 U-Boot SPL"
#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS		0
#define CONFIG_SPL_SPI_CS		0
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE	0x40000
#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"

/*
 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 * 64 bytes before this address should be set aside for u-boot.img's
 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 * other needs.
 */
#define CONFIG_SYS_TEXT_BASE		0x80800000
#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000

/* Since SPL did pll and ddr initialization for us,
 * we don't need to do it twice.
 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

/*
 * USB configuration
 */
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_MUSB_GADGET
#define CONFIG_MUSB_PIO_ONLY
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_MUSB_HOST
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE	MUSB_PERIPHERAL
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST

#ifdef CONFIG_MUSB_HOST
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif

#ifdef CONFIG_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#endif /* CONFIG_MUSB_GADGET */

/* Unsupported features */
#undef CONFIG_USE_IRQ

#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT         10
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR			0
#define CONFIG_PHY_SMSC

#endif	/* ! __CONFIG_PCM051_H */
Commit	Line	Data
1c1b7c37 LP	1	/*
	2	* pcm051.h
	3	*
	4	* Phytec phyCORE-AM335x (pcm051) boards information header
	5	*
	6	* Copyright (C) 2013 Lemonage Software GmbH
	7	* Author Lars Poeschel <poeschel@lemonage.de>
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation version 2.
	12	*
	13	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	14	* kind, whether express or implied; without even the implied warranty
	15	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*/
	18
	19	#ifndef __CONFIG_PCM051_H
	20	#define __CONFIG_PCM051_H
	21
	22	#define CONFIG_AM33XX
4a0eb757	23	#define CONFIG_OMAP
1c1b7c37	24
98f92001	25	#include <asm/arch/omap.h>
1c1b7c37 LP	26
	27	#define CONFIG_DMA_COHERENT
	28	#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
	29
	30	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
	31	#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
	32	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	33	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
	34	#define CONFIG_SYS_PROMPT "U-Boot# "
	35	#define CONFIG_SYS_NO_FLASH
	36	#define MACH_TYPE_PCM051 4144 /* Until the next sync */
	37	#define CONFIG_MACH_TYPE MACH_TYPE_PCM051
	38
	39	#define CONFIG_OF_LIBFDT
	40	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	41	#define CONFIG_SETUP_MEMORY_TAGS
	42	#define CONFIG_INITRD_TAG
	43
	44	/* commands to include */
	45	#include <config_cmd_default.h>
	46
	47	#define CONFIG_CMD_ASKENV
	48	#define CONFIG_VERSION_VARIABLE
	49
	50	/* set to negative value for no autoboot */
	51	#define CONFIG_BOOTDELAY 1
	52	#define CONFIG_ENV_VARS_UBOOT_CONFIG
	53	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	54	#define CONFIG_EXTRA_ENV_SETTINGS \
	55	"loadaddr=0x80007fc0\0" \
	56	"fdtaddr=0x80000000\0" \
	57	"rdaddr=0x81000000\0" \
	58	"bootfile=uImage\0" \
	59	"fdtfile=pcm051.dtb\0" \
	60	"console=ttyO0,115200n8\0" \
	61	"optargs=\0" \
	62	"mmcdev=0\0" \
	63	"mmcroot=/dev/mmcblk0p2 ro\0" \
	64	"mmcrootfstype=ext4 rootwait\0" \
	65	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
	66	"ramrootfstype=ext2\0" \
	67	"mmcargs=setenv bootargs console=${console} " \
	68	"${optargs} " \
	69	"root=${mmcroot} " \
	70	"rootfstype=${mmcrootfstype}\0" \
	71	"bootenv=uEnv.txt\0" \
	72	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	73	"importbootenv=echo Importing environment from mmc ...; " \
	74	"env import -t $loadaddr $filesize\0" \
	75	"ramargs=setenv bootargs console=${console} " \
	76	"${optargs} " \
	77	"root=${ramroot} " \
	78	"rootfstype=${ramrootfstype}\0" \
	79	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
	80	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
	81	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
	82	"mmcboot=echo Booting from mmc ...; " \
	83	"run mmcargs; " \
	84	"bootm ${loadaddr}\0" \
	85	"ramboot=echo Booting from ramdisk ...; " \
	86	"run ramargs; " \
	87	"bootm ${loadaddr}\0" \
	88
	89	#define CONFIG_BOOTCOMMAND \
90	"mmc dev ${mmcdev}; if mmc rescan; then " \
91	"echo SD/MMC found on device ${mmcdev};" \
92	"if run loadbootenv; then " \
93	"echo Loaded environment from ${bootenv};" \
94	"run importbootenv;" \
95	"fi;" \
96	"if test -n $uenvcmd; then " \
97	"echo Running uenvcmd ...;" \
98	"run uenvcmd;" \
99	"fi;" \
100	"if run loaduimage; then " \
101	"run mmcboot;" \
102	"fi;" \
103	"fi;" \
104
105	/* Clock Defines */
106	#define V_OSCK 25000000 /* Clock output from T2 */
107	#define V_SCLK (V_OSCK)
108
109	#define CONFIG_CMD_ECHO
110
111	/* max number of command args */
112	#define CONFIG_SYS_MAXARGS 16
113
114	/* Console I/O Buffer Size */
115	#define CONFIG_SYS_CBSIZE 512
116
117	/* Print Buffer Size */
118	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
119	+ sizeof(CONFIG_SYS_PROMPT) + 16)
120
121	/* Boot Argument Buffer Size */
122	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
123
124	/*
125	* memtest works on 8 MB in DRAM after skipping 32MB from
126	* start addr of ram disk
127	*/
128	#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
129	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
130	+ (8 * 1024 * 1024))
131
132	#define CONFIG_SYS_LOAD_ADDR 0x80007fc0 /* Default load address */
1c1b7c37 LP	133
	134	#define CONFIG_MMC
	135	#define CONFIG_GENERIC_MMC
	136	#define CONFIG_OMAP_HSMMC
	137	#define CONFIG_CMD_MMC
	138	#define CONFIG_DOS_PARTITION
	139	#define CONFIG_CMD_FAT
	140	#define CONFIG_CMD_EXT2
	141
	142	#define CONFIG_SPI
	143	#define CONFIG_OMAP3_SPI
	144	#define CONFIG_MTD_DEVICE
	145	#define CONFIG_SPI_FLASH
	146	#define CONFIG_SPI_FLASH_WINBOND
	147	#define CONFIG_CMD_SF
	148	#define CONFIG_SF_DEFAULT_SPEED 24000000
	149
	150	/* Physical Memory Map */
	151	#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
	152	#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
	153	#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */
	154
	155	#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
	156	#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
	157	GENERATED_GBL_DATA_SIZE)
	158	/* Platform/Board specific defs */
	159	#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
	160	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
15191c91	161	#define CONFIG_SYS_HZ 1000 /* 1ms clock */
1c1b7c37 LP	162
	163	#define CONFIG_CONS_INDEX 1
	164	/* NS16550 Configuration */
	165	#define CONFIG_SYS_NS16550
	166	#define CONFIG_SYS_NS16550_SERIAL
1c1b7c37 LP	167	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	168	#define CONFIG_SYS_NS16550_CLK (48000000)
	169	#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
	170	#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
	171	#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
	172	#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
	173	#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
	174	#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
	175
	176	/* I2C Configuration */
	177	#define CONFIG_I2C
	178	#define CONFIG_CMD_I2C
	179	#define CONFIG_HARD_I2C
	180	#define CONFIG_SYS_I2C_SPEED 100000
	181	#define CONFIG_SYS_I2C_SLAVE 1
	182	#define CONFIG_I2C_MULTI_BUS
	183	#define CONFIG_DRIVER_OMAP24XX_I2C
	184	#define CONFIG_CMD_EEPROM
	185	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	186	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
	187	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	188	#define CONFIG_SYS_I2C_MULTI_EEPROMS
	189
	190	#define CONFIG_OMAP_GPIO
	191
	192	#define CONFIG_BAUDRATE 115200
	193	#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
	194	4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
	195
47c6ea07 S	196	/* CPU */
	197	#define CONFIG_ARCH_CPU_INIT
	198
1c1b7c37 LP	199	#define CONFIG_ENV_OVERWRITE
	200	#define CONFIG_SYS_CONSOLE_INFO_QUIET
	201
	202	#define CONFIG_ENV_IS_NOWHERE
	203
	204	/* Defines for SPL */
	205	#define CONFIG_SPL
	206	#define CONFIG_SPL_FRAMEWORK
320d9746	207	/*
edfcf85a	208	* Place the image at the start of the ROM defined image space.
320d9746 TR	209	* We limit our size to the ROM-defined downloaded image area, and use the
	210	* rest of the space for stack.
	211	*/
edfcf85a	212	#define CONFIG_SPL_TEXT_BASE 0x402F0400
320d9746	213	#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
1c1b7c37 LP	214	#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
	215
	216	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	217	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
	218
	219	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	220	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
	221	#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
	222	#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
	223	#define CONFIG_SPL_MMC_SUPPORT
	224	#define CONFIG_SPL_FAT_SUPPORT
	225	#define CONFIG_SPL_I2C_SUPPORT
	226
	227	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	228	#define CONFIG_SPL_LIBDISK_SUPPORT
	229	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	230	#define CONFIG_SPL_SERIAL_SUPPORT
	231	#define CONFIG_SPL_GPIO_SUPPORT
	232	#define CONFIG_SPL_YMODEM_SUPPORT
	233	#define CONFIG_SPL_NET_SUPPORT
ba1bee43	234	#define CONFIG_SPL_ENV_SUPPORT
1c1b7c37 LP	235	#define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL"
	236	#define CONFIG_SPL_ETH_SUPPORT
	237	#define CONFIG_SPL_SPI_SUPPORT
	238	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	239	#define CONFIG_SPL_SPI_LOAD
	240	#define CONFIG_SPL_SPI_BUS 0
	241	#define CONFIG_SPL_SPI_CS 0
	242	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
	243	#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
65cdd643	244	#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
1c1b7c37 LP	245
	246	/*
	247	* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	248	* 64 bytes before this address should be set aside for u-boot.img's
	249	* header. That is 0x800FFFC0--0x80100000 should not be used for any
	250	* other needs.
	251	*/
	252	#define CONFIG_SYS_TEXT_BASE 0x80800000
	253	#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	254	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
	255
	256	/* Since SPL did pll and ddr initialization for us,
	257	* we don't need to do it twice.
	258	*/
	259	#ifndef CONFIG_SPL_BUILD
	260	#define CONFIG_SKIP_LOWLEVEL_INIT
	261	#endif
	262
	263	/*
	264	* USB configuration
	265	*/
	266	#define CONFIG_USB_MUSB_DSPS
	267	#define CONFIG_ARCH_MISC_INIT
	268	#define CONFIG_MUSB_GADGET
	269	#define CONFIG_MUSB_PIO_ONLY
	270	#define CONFIG_USB_GADGET_DUALSPEED
	271	#define CONFIG_MUSB_HOST
	272	#define CONFIG_AM335X_USB0
	273	#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
	274	#define CONFIG_AM335X_USB1
	275	#define CONFIG_AM335X_USB1_MODE MUSB_HOST
	276
	277	#ifdef CONFIG_MUSB_HOST
	278	#define CONFIG_CMD_USB
	279	#define CONFIG_USB_STORAGE
	280	#endif
	281
	282	#ifdef CONFIG_MUSB_GADGET
	283	#define CONFIG_USB_ETHER
	284	#define CONFIG_USB_ETH_RNDIS
	285	#endif /* CONFIG_MUSB_GADGET */
	286
	287	/* Unsupported features */
	288	#undef CONFIG_USE_IRQ
	289
	290	#define CONFIG_CMD_NET
	291	#define CONFIG_CMD_DHCP
	292	#define CONFIG_CMD_PING
	293	#define CONFIG_DRIVER_TI_CPSW
	294	#define CONFIG_MII
	295	#define CONFIG_BOOTP_DEFAULT
	296	#define CONFIG_BOOTP_DNS
	297	#define CONFIG_BOOTP_DNS2
	298	#define CONFIG_BOOTP_SEND_HOSTNAME
	299	#define CONFIG_BOOTP_GATEWAY
	300	#define CONFIG_BOOTP_SUBNETMASK
	301	#define CONFIG_NET_RETRY_COUNT 10
	302	#define CONFIG_NET_MULTI
	303	#define CONFIG_PHY_GIGE
	304	#define CONFIG_PHYLIB
	305	#define CONFIG_PHY_ADDR 0
	306	#define CONFIG_PHY_SMSC
	307
	308	#endif /* ! __CONFIG_PCM051_H */