projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 876a25d2 SB |
2 | /* |
| 3 | * Copyright (C) Stefano Babic <sbabic@denx.de> | |
| 876a25d2 SB |
4 | */ |
| 5 | ||
| 6 | ||
| 7 | #ifndef __PCM058_CONFIG_H | |
| 8 | #define __PCM058_CONFIG_H | |
| 9 | ||
| 876a25d2 | 10 | #ifdef CONFIG_SPL |
| 876a25d2 SB |
11 | #include "imx6_spl.h" |
| 12 | #endif | |
| 13 | ||
| 14 | #include "mx6_common.h" | |
| 15 | ||
| 16 | /* Thermal */ | |
| 17 | #define CONFIG_IMX_THERMAL | |
| 18 | ||
| 19 | /* Serial */ | |
| 20 | #define CONFIG_MXC_UART | |
| 21 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
| 12ca05a3 | 22 | #define CONSOLE_DEV "ttymxc1" |
| 876a25d2 SB |
23 | |
| 24 | #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) | |
| 25 | ||
| 26 | /* Early setup */ | |
| 876a25d2 SB |
27 | |
| 28 | ||
| 29 | /* Size of malloc() pool */ | |
| 30 | #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) | |
| 31 | ||
| 32 | /* Ethernet */ | |
| 33 | #define CONFIG_FEC_MXC | |
| 876a25d2 SB |
34 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 35 | #define CONFIG_FEC_XCV_TYPE RGMII | |
| 36 | #define CONFIG_ETHPRIME "FEC" | |
| 37 | #define CONFIG_FEC_MXC_PHYADDR 3 | |
| 38 | ||
| 876a25d2 | 39 | /* SPI Flash */ |
| 876a25d2 SB |
40 | |
| 41 | /* I2C Configs */ | |
| 42 | #define CONFIG_SYS_I2C | |
| 43 | #define CONFIG_SYS_I2C_MXC | |
| 44 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */ | |
| 45 | #define CONFIG_SYS_I2C_SPEED 100000 | |
| 46 | ||
| 47 | #ifndef CONFIG_SPL_BUILD | |
| 876a25d2 | 48 | /* Enable NAND support */ |
| 876a25d2 SB |
49 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 50 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
| 51 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
| 52 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
| 53 | #endif | |
| 54 | ||
| 55 | /* DMA stuff, needed for GPMI/MXS NAND support */ | |
| 876a25d2 SB |
56 | |
| 57 | /* Filesystem support */ | |
| 876a25d2 | 58 | |
| 876a25d2 | 59 | /* Physical Memory Map */ |
| 876a25d2 SB |
60 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 61 | ||
| 62 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
| 63 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
| 64 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
| 65 | ||
| 66 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
| 67 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
| 68 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 69 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
| 70 | ||
| 71 | /* MMC Configs */ | |
| 72 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
| 73 | #define CONFIG_SYS_FSL_USDHC_NUM 1 | |
| 74 | ||
| 75 | /* Environment organization */ | |
| 876a25d2 SB |
76 | |
| 77 | #endif |