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01fa4e8c VL |
1 | /* |
2 | * (C) Copyright 2009 | |
3 | * Marvell Semiconductor <www.marvell.com> | |
4 | * Prafulla Wadaskar <prafulla@marvell.com> | |
5 | * | |
6 | * (C) Copyright 2009 | |
7 | * Stefan Roese, DENX Software Engineering, sr@denx.de. | |
8 | * | |
9 | * (C) Copyright 2010-2011 | |
10 | * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com. | |
11 | * Valentin Longchamp, Keymile AG Bern, valentin.longchamp@keymile.com | |
12 | * | |
13 | * See file CREDITS for list of people who contributed to this | |
14 | * project. | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or | |
17 | * modify it under the terms of the GNU General Public License as | |
18 | * published by the Free Software Foundation; either version 2 of | |
19 | * the License, or (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, write to the Free Software | |
28 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
29 | * MA 02110-1301 USA | |
30 | */ | |
31 | ||
32 | /* for linking errors see | |
33 | * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */ | |
34 | ||
35 | #ifndef _CONFIG_PORTL2_H | |
36 | #define _CONFIG_PORTL2_H | |
37 | ||
38 | /* include common defines/options for all arm based Keymile boards */ | |
39 | #include "km/km_arm.h" | |
40 | ||
41 | /* | |
42 | * Version number information | |
43 | */ | |
44 | #define CONFIG_IDENT_STRING "\nKeymile Port-L2" | |
45 | #define CONFIG_HOSTNAME portl2 | |
46 | #define CONFIG_PORTL2 | |
47 | ||
48 | #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ | |
5e454e0a TH |
49 | /* |
50 | * Note: This is only valid for HW > P1A if you got an outdated P1A | |
51 | * use KM_ENV_BUS "pca9544a:70:a" | |
52 | */ | |
53 | #define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/ | |
01fa4e8c VL |
54 | |
55 | /* | |
56 | * portl2 has a fixed link to the XMPP backplane | |
57 | * with 100MB full duplex and autoneg off, for this | |
58 | * reason we have to change the default settings | |
59 | */ | |
60 | #define PORT_SERIAL_CONTROL_VALUE ( \ | |
61 | MVGBE_FORCE_LINK_PASS | \ | |
62 | MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ | |
63 | MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ | |
64 | MVGBE_ADV_NO_FLOW_CTRL | \ | |
65 | MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ | |
66 | MVGBE_FORCE_BP_MODE_NO_JAM | \ | |
67 | (1 << 9) /* Reserved bit has to be 1 */ | \ | |
68 | MVGBE_DO_NOT_FORCE_LINK_FAIL | \ | |
69 | MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ | |
70 | MVGBE_DTE_ADV_0 | \ | |
71 | MVGBE_MIIPHY_MAC_MODE | \ | |
72 | MVGBE_AUTO_NEG_NO_CHANGE | \ | |
73 | MVGBE_MAX_RX_PACKET_1552BYTE | \ | |
74 | MVGBE_CLR_EXT_LOOPBACK | \ | |
75 | MVGBE_SET_FULL_DUPLEX_MODE | \ | |
76 | MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ | |
77 | MVGBE_SET_GMII_SPEED_TO_10_100 |\ | |
78 | MVGBE_SET_MII_SPEED_TO_100) | |
79 | ||
80 | /* | |
81 | * portl2 does use the PCIe Port0 | |
82 | */ | |
83 | #define CONFIG_KIRKWOOD_PCIE_INIT | |
84 | ||
85 | #endif /* _CONFIG_PORTL2_H */ |