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fa08d395 AG |
1 | /* |
2 | * Copyright 2011-2014 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | /* | |
8 | * Corenet DS style board configuration file | |
9 | */ | |
10 | #ifndef __QEMU_PPCE500_H | |
11 | #define __QEMU_PPCE500_H | |
12 | ||
13 | #define CONFIG_CMD_REGINFO | |
14 | ||
15 | /* High Level Configuration Options */ | |
16 | #define CONFIG_BOOKE | |
17 | #define CONFIG_E500 /* BOOKE e500 family */ | |
18 | #define CONFIG_QEMU_E500 | |
19 | ||
20 | #undef CONFIG_SYS_TEXT_BASE | |
21 | #define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */ | |
22 | ||
23 | #define CONFIG_SYS_MPC85XX_NO_RESETVEC | |
24 | ||
25 | #define CONFIG_SYS_RAMBOOT | |
26 | ||
27 | #define CONFIG_PCI /* Enable PCI/PCIE */ | |
28 | #define CONFIG_PCI1 1 /* PCI controller 1 */ | |
29 | #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ | |
30 | #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ | |
31 | ||
32 | #define CONFIG_ENV_OVERWRITE | |
33 | ||
34 | #define CONFIG_ENABLE_36BIT_PHYS | |
35 | ||
36 | #define CONFIG_ADDR_MAP | |
37 | #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ | |
38 | ||
39 | #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ | |
40 | #define CONFIG_SYS_MEMTEST_END 0x00400000 | |
41 | #define CONFIG_SYS_ALT_MEMTEST | |
42 | #define CONFIG_PANIC_HANG /* do not reset board on panic */ | |
43 | ||
44 | /* Needed to fill the ccsrbar pointer */ | |
45 | #define CONFIG_BOARD_EARLY_INIT_F | |
46 | ||
47 | /* Virtual address to CCSRBAR */ | |
48 | #define CONFIG_SYS_CCSRBAR 0xe0000000 | |
49 | /* Physical address should be a function call */ | |
50 | #ifndef __ASSEMBLY__ | |
51 | extern unsigned long long get_phys_ccsrbar_addr_early(void); | |
e834975b AG |
52 | #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) |
53 | #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() | |
54 | #else | |
55 | #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 | |
56 | #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR | |
fa08d395 | 57 | #endif |
e834975b AG |
58 | |
59 | #define CONFIG_PHYS_64BIT | |
fa08d395 AG |
60 | |
61 | /* Virtual address range for PCI region maps */ | |
62 | #define CONFIG_SYS_PCI_MAP_START 0x80000000 | |
63 | #define CONFIG_SYS_PCI_MAP_END 0xe8000000 | |
64 | ||
65 | /* Virtual address to a temporary map if we need it (max 128MB) */ | |
66 | #define CONFIG_SYS_TMPVIRT 0xe8000000 | |
67 | ||
68 | /* | |
69 | * DDR Setup | |
70 | */ | |
71 | #define CONFIG_VERY_BIG_RAM | |
72 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 | |
73 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE | |
74 | ||
75 | #define CONFIG_CHIP_SELECTS_PER_CTRL 0 | |
76 | ||
77 | #define CONFIG_SYS_CLK_FREQ 33000000 | |
78 | ||
79 | #define CONFIG_SYS_NO_FLASH | |
80 | ||
81 | #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ | |
82 | ||
83 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE | |
84 | ||
85 | #define CONFIG_ENV_IS_NOWHERE | |
86 | ||
87 | #define CONFIG_HWCONFIG | |
88 | ||
89 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000 | |
90 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 | |
91 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 | |
92 | /* The assembler doesn't like typecast */ | |
93 | #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ | |
94 | ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ | |
95 | CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) | |
96 | #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 | |
97 | ||
98 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ | |
99 | GENERATED_GBL_DATA_SIZE) | |
100 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET | |
101 | ||
102 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) | |
103 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) | |
104 | ||
105 | #define CONFIG_CONS_INDEX 1 | |
106 | #define CONFIG_SYS_NS16550 | |
107 | #define CONFIG_SYS_NS16550_SERIAL | |
108 | #define CONFIG_SYS_NS16550_REG_SIZE 1 | |
109 | #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) | |
110 | ||
111 | #define CONFIG_SYS_BAUDRATE_TABLE \ | |
112 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} | |
113 | ||
114 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) | |
115 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) | |
116 | ||
117 | /* Use the HUSH parser */ | |
118 | #define CONFIG_SYS_HUSH_PARSER | |
119 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
120 | ||
121 | /* pass open firmware flat tree */ | |
122 | #define CONFIG_OF_LIBFDT | |
123 | #define CONFIG_OF_BOARD_SETUP | |
124 | #define CONFIG_OF_STDOUT_VIA_ALIAS | |
125 | ||
126 | /* new uImage format support */ | |
127 | #define CONFIG_FIT | |
128 | #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ | |
129 | ||
130 | /* | |
131 | * General PCI | |
132 | * Memory space is mapped 1-1, but I/O space must start from 0. | |
133 | */ | |
134 | ||
135 | #ifdef CONFIG_PCI | |
136 | #define CONFIG_PCI_INDIRECT_BRIDGE | |
fa08d395 | 137 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
fa08d395 AG |
138 | |
139 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ | |
140 | #define CONFIG_DOS_PARTITION | |
141 | #endif /* CONFIG_PCI */ | |
142 | ||
143 | #define CONFIG_LBA48 | |
144 | #define CONFIG_DOS_PARTITION | |
145 | #define CONFIG_CMD_EXT2 | |
146 | ||
147 | /* | |
148 | * Environment | |
149 | */ | |
150 | #define CONFIG_ENV_SIZE 0x2000 | |
151 | ||
152 | #define CONFIG_LOADS_ECHO /* echo on for serial download */ | |
153 | ||
154 | #define CONFIG_LAST_STAGE_INIT | |
155 | ||
156 | /* | |
157 | * Command line configuration. | |
158 | */ | |
fa08d395 | 159 | #define CONFIG_CMD_DHCP |
fa08d395 AG |
160 | #define CONFIG_CMD_BOOTZ |
161 | #define CONFIG_CMD_GREPENV | |
162 | #define CONFIG_CMD_IRQ | |
163 | #define CONFIG_CMD_PING | |
fa08d395 AG |
164 | |
165 | #ifdef CONFIG_PCI | |
166 | #define CONFIG_CMD_PCI | |
fa08d395 AG |
167 | #endif |
168 | ||
169 | /* | |
170 | * Miscellaneous configurable options | |
171 | */ | |
172 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
173 | #define CONFIG_CMDLINE_EDITING /* Command-line editing */ | |
174 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ | |
175 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ | |
176 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
177 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
178 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
179 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ | |
180 | ||
181 | /* | |
182 | * For booting Linux, the board info and command line data | |
183 | * have to be in the first 64 MB of memory, since this is | |
184 | * the maximum mapped by the Linux kernel during initialization. | |
185 | */ | |
186 | #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ | |
187 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ | |
188 | ||
189 | /* | |
190 | * Environment Configuration | |
191 | */ | |
192 | #define CONFIG_ROOTPATH "/opt/nfsroot" | |
193 | #define CONFIG_BOOTFILE "uImage" | |
194 | #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ | |
195 | ||
196 | /* default location for tftp and bootm */ | |
197 | #define CONFIG_LOADADDR 1000000 | |
198 | ||
199 | #define CONFIG_BAUDRATE 115200 | |
200 | ||
201 | #define CONFIG_BOOTDELAY 1 | |
202 | #define CONFIG_BOOTCOMMAND \ | |
203 | "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0" | |
204 | ||
205 | #endif /* __QEMU_PPCE500_H */ |