projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| be1d5e03 | 1 | /* |
| 2 | * (C) Copyright 2015 Rockchip Electronics Co., Ltd | |
| 3 | * | |
| 4 | * SPDX-License-Identifier: GPL-2.0+ | |
| 5 | */ | |
| 6 | #ifndef __CONFIG_RK3036_COMMON_H | |
| 7 | #define __CONFIG_RK3036_COMMON_H | |
| 8 | ||
| 9 | #include <asm/arch/hardware.h> | |
| 10 | ||
| 11 | #define CONFIG_SYS_NO_FLASH | |
| 12 | #define CONFIG_NR_DRAM_BANKS 1 | |
| 13 | #define CONFIG_ENV_IS_NOWHERE | |
| 14 | #define CONFIG_ENV_SIZE 0x2000 | |
| 15 | #define CONFIG_SYS_MAXARGS 16 | |
| 16 | #define CONFIG_BAUDRATE 115200 | |
| 17 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) | |
| 18 | #define CONFIG_SYS_CBSIZE 1024 | |
| 19 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
| 20 | #define CONFIG_SYS_THUMB_BUILD | |
| 21 | #define CONFIG_DISPLAY_BOARDINFO | |
| 22 | ||
| 23 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) | |
| 24 | #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ | |
| 25 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) | |
| 26 | ||
| 27 | #define CONFIG_SYS_NS16550 | |
| 28 | #define CONFIG_SYS_NS16550_MEM32 | |
| 29 | ||
| be1d5e03 | 30 | #define CONFIG_SYS_TEXT_BASE 0x60000000 |
| 31 | #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 | |
| 32 | #define CONFIG_SYS_LOAD_ADDR 0x60800800 | |
| 33 | #define CONFIG_SPL_STACK 0x10081fff | |
| 34 | #define CONFIG_SPL_TEXT_BASE 0x10081004 | |
| 35 | ||
| 36 | #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) | |
| 37 | #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" | |
| 38 | ||
| be1d5e03 | 39 | /* MMC/SD IP block */ |
| 40 | #define CONFIG_MMC | |
| 41 | #define CONFIG_GENERIC_MMC | |
| be1d5e03 | 42 | #define CONFIG_DWMMC |
| 43 | #define CONFIG_BOUNCE_BUFFER | |
| 44 | ||
| be1d5e03 | 45 | #define CONFIG_FAT_WRITE |
| be1d5e03 | 46 | #define CONFIG_PARTITION_UUIDS |
| 47 | #define CONFIG_CMD_PART | |
| 48 | ||
| be1d5e03 | 49 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
| 50 | #define CONFIG_NR_DRAM_BANKS 1 | |
| 51 | #define SDRAM_BANK_SIZE (512UL << 20UL) | |
| 52 | ||
| 53 | #define CONFIG_SPI_FLASH | |
| 54 | #define CONFIG_SPI | |
| be1d5e03 | 55 | #define CONFIG_SPI_FLASH_GIGADEVICE |
| 56 | #define CONFIG_SF_DEFAULT_SPEED 20000000 | |
| 57 | ||
| be1d5e03 | 58 | #ifndef CONFIG_SPL_BUILD |
| d2d763fa XZ |
59 | /* usb otg */ |
| 60 | #define CONFIG_USB_GADGET | |
| 61 | #define CONFIG_USB_GADGET_DUALSPEED | |
| 62 | #define CONFIG_USB_GADGET_DWC2_OTG | |
| 63 | #define CONFIG_USB_GADGET_VBUS_DRAW 0 | |
| 64 | ||
| 65 | /* fastboot */ | |
| 66 | #define CONFIG_CMD_FASTBOOT | |
| 67 | #define CONFIG_USB_FUNCTION_FASTBOOT | |
| 68 | #define CONFIG_FASTBOOT_FLASH | |
| 69 | #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 | |
| 70 | #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR | |
| 71 | #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 | |
| 72 | ||
| 73 | #define CONFIG_USB_GADGET_DOWNLOAD | |
| 74 | #define CONFIG_G_DNL_MANUFACTURER "Rockchip" | |
| 75 | #define CONFIG_G_DNL_VENDOR_NUM 0x2207 | |
| 76 | #define CONFIG_G_DNL_PRODUCT_NUM 0x310a | |
| 77 | ||
| be1d5e03 | 78 | #include <config_distro_defaults.h> |
| 79 | ||
| 80 | #define ENV_MEM_LAYOUT_SETTINGS \ | |
| 81 | "scriptaddr=0x60000000\0" \ | |
| 82 | "pxefile_addr_r=0x60100000\0" \ | |
| 83 | "fdt_addr_r=0x61f00000\0" \ | |
| 84 | "kernel_addr_r=0x62000000\0" \ | |
| 85 | "ramdisk_addr_r=0x64000000\0" | |
| 86 | ||
| 87 | /* First try to boot from SD (index 0), then eMMC (index 1 */ | |
| 88 | #define BOOT_TARGET_DEVICES(func) \ | |
| 89 | func(MMC, mmc, 0) \ | |
| 90 | func(MMC, mmc, 1) | |
| 91 | ||
| 92 | #include <config_distro_bootcmd.h> | |
| 93 | ||
| 94 | /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, | |
| 95 | * so limit the fdt reallocation to that */ | |
| 96 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 97 | "fdt_high=0x7fffffff\0" \ | |
| 98 | ENV_MEM_LAYOUT_SETTINGS \ | |
| 99 | BOOTENV | |
| 100 | #endif | |
| 101 | ||
| 102 | #endif |