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0a2be69f HS |
1 | /* |
2 | * (C) Copyright 2015 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __CONFIG_RK3188_COMMON_H | |
8 | #define __CONFIG_RK3188_COMMON_H | |
9 | ||
10 | #define CONFIG_SYS_CACHELINE_SIZE 64 | |
11 | ||
12 | #include <asm/arch/hardware.h> | |
13 | #include "rockchip-common.h" | |
14 | ||
15 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY | |
0a2be69f | 16 | #define CONFIG_NR_DRAM_BANKS 1 |
0a2be69f HS |
17 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
18 | #define CONFIG_SYS_CBSIZE 1024 | |
0a2be69f HS |
19 | |
20 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) | |
21 | #define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */ | |
22 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) | |
23 | #define CONFIG_SYS_TIMER_COUNTS_DOWN | |
24 | ||
25 | #define CONFIG_SYS_NS16550_MEM32 | |
0a2be69f | 26 | |
ee14d29d | 27 | #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM |
0a2be69f HS |
28 | /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ |
29 | #define CONFIG_SYS_TEXT_BASE 0x60000000 | |
30 | #else | |
31 | #define CONFIG_SYS_TEXT_BASE 0x60100000 | |
32 | #endif | |
33 | #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 | |
34 | #define CONFIG_SYS_LOAD_ADDR 0x60800800 | |
35 | ||
36 | #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) | |
37 | #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" | |
38 | ||
4d9253fb PT |
39 | #define CONFIG_SPL_TEXT_BASE 0x10080800 |
40 | /* spl size 32kb sram - 2kb bootrom */ | |
41 | #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) | |
0a2be69f | 42 | #define CONFIG_SPL_FRAMEWORK 1 |
0a2be69f | 43 | #define CONFIG_ROCKCHIP_SERIAL 1 |
0a2be69f HS |
44 | |
45 | #define CONFIG_SPL_STACK 0x10087fff | |
46 | ||
47 | /* MMC/SD IP block */ | |
48 | #define CONFIG_BOUNCE_BUFFER | |
49 | ||
0a2be69f HS |
50 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
51 | #define CONFIG_NR_DRAM_BANKS 1 | |
52 | #define SDRAM_BANK_SIZE (2UL << 30) | |
6d1970fa | 53 | #define SDRAM_MAX_SIZE 0x80000000 |
0a2be69f HS |
54 | |
55 | #define CONFIG_SPI_FLASH | |
56 | #define CONFIG_SPI | |
57 | #define CONFIG_SF_DEFAULT_SPEED 20000000 | |
58 | ||
59 | #ifndef CONFIG_SPL_BUILD | |
60 | /* usb otg */ | |
0a2be69f | 61 | #define CONFIG_ROCKCHIP_USB2_PHY |
0a2be69f HS |
62 | |
63 | /* usb host support */ | |
0a2be69f HS |
64 | #define ENV_MEM_LAYOUT_SETTINGS \ |
65 | "scriptaddr=0x60000000\0" \ | |
66 | "pxefile_addr_r=0x60100000\0" \ | |
67 | "fdt_addr_r=0x61f00000\0" \ | |
68 | "kernel_addr_r=0x62000000\0" \ | |
69 | "ramdisk_addr_r=0x64000000\0" | |
70 | ||
71 | #include <config_distro_bootcmd.h> | |
72 | ||
73 | /* Linux fails to load the fdt if it's loaded above 256M on a Rock board, | |
74 | * so limit the fdt reallocation to that */ | |
75 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
76 | "fdt_high=0x6fffffff\0" \ | |
77 | "initrd_high=0x6fffffff\0" \ | |
78 | "partitions=" PARTS_DEFAULT \ | |
79 | ENV_MEM_LAYOUT_SETTINGS \ | |
80 | ROCKCHIP_DEVICE_SETTINGS \ | |
81 | BOOTENV | |
82 | ||
83 | #endif /* CONFIG_SPL_BUILD */ | |
84 | ||
85 | #define CONFIG_PREBOOT | |
86 | ||
87 | #endif |