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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
17aa548c SG |
2 | /* |
3 | * (C) Copyright 2015 Google, Inc | |
17aa548c SG |
4 | */ |
5 | ||
6 | #ifndef __CONFIG_RK3288_COMMON_H | |
7 | #define __CONFIG_RK3288_COMMON_H | |
8 | ||
9 | #include <asm/arch/hardware.h> | |
7f35bbb9 | 10 | #include "rockchip-common.h" |
17aa548c | 11 | |
5a4a90f6 | 12 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY |
17aa548c | 13 | #define CONFIG_NR_DRAM_BANKS 1 |
17aa548c SG |
14 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
15 | #define CONFIG_SYS_CBSIZE 1024 | |
17aa548c SG |
16 | |
17 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) | |
cc2244b8 | 18 | #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ |
19 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) | |
17aa548c | 20 | |
ee14d29d | 21 | #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM |
b47ea792 | 22 | /* Bootrom will load u-boot binary to 0x0 once return from SPL */ |
b47ea792 | 23 | #endif |
17aa548c SG |
24 | #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 |
25 | #define CONFIG_SYS_LOAD_ADDR 0x00800800 | |
26 | #define CONFIG_SPL_STACK 0xff718000 | |
532cb7f5 JT |
27 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) |
28 | # define CONFIG_SPL_TEXT_BASE 0x0 | |
29 | #else | |
a33fee15 | 30 | # define CONFIG_SPL_TEXT_BASE 0xff704000 |
532cb7f5 | 31 | #endif |
17aa548c SG |
32 | |
33 | /* MMC/SD IP block */ | |
17aa548c SG |
34 | #define CONFIG_BOUNCE_BUFFER |
35 | ||
17aa548c | 36 | /* RAW SD card / eMMC locations. */ |
17aa548c SG |
37 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) |
38 | ||
39 | /* FAT sd card locations. */ | |
40 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | |
41 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
42 | ||
17aa548c SG |
43 | #define CONFIG_SYS_SDRAM_BASE 0 |
44 | #define CONFIG_NR_DRAM_BANKS 1 | |
45 | #define SDRAM_BANK_SIZE (2UL << 30) | |
6d1970fa | 46 | #define SDRAM_MAX_SIZE 0xfe000000 |
17aa548c SG |
47 | |
48 | #define CONFIG_SPI_FLASH | |
17aa548c SG |
49 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
50 | ||
1743d0ba | 51 | #ifndef CONFIG_SPL_BUILD |
266c8fad | 52 | /* usb otg */ |
266c8fad | 53 | |
b9f9339b | 54 | /* usb mass storage */ |
b9f9339b XZ |
55 | #define CONFIG_CMD_USB_MASS_STORAGE |
56 | ||
f57f35a8 | 57 | /* usb host support */ |
6460fc42 SS |
58 | #define ENV_MEM_LAYOUT_SETTINGS \ |
59 | "scriptaddr=0x00000000\0" \ | |
60 | "pxefile_addr_r=0x00100000\0" \ | |
61 | "fdt_addr_r=0x01f00000\0" \ | |
62 | "kernel_addr_r=0x02000000\0" \ | |
63 | "ramdisk_addr_r=0x04000000\0" | |
64 | ||
6460fc42 SS |
65 | #include <config_distro_bootcmd.h> |
66 | ||
60169826 | 67 | /* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so |
6460fc42 SS |
68 | * limit the fdt reallocation to that */ |
69 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
60169826 SP |
70 | "fdt_high=0x0fffffff\0" \ |
71 | "initrd_high=0x0fffffff\0" \ | |
2144c74f | 72 | "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
6ead8bd7 | 73 | "partitions=" PARTS_DEFAULT \ |
6460fc42 | 74 | ENV_MEM_LAYOUT_SETTINGS \ |
27a1961d | 75 | ROCKCHIP_DEVICE_SETTINGS \ |
6460fc42 | 76 | BOOTENV |
17aa548c SG |
77 | #endif |
78 | ||
67171e13 JC |
79 | #define CONFIG_PREBOOT |
80 | ||
17aa548c | 81 | #endif |