projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 7fbeb642 | 1 | /* |
| efa4e1b9 | 2 | * Configuation settings for the Renesas RSK2+SH7264 board |
| 7fbeb642 PE |
3 | * |
| 4 | * Copyright (C) 2011 Renesas Electronics Europe Ltd. | |
| 5 | * Copyright (C) 2008 Nobuhiro Iwamatsu | |
| 6 | * Copyright (C) 2008 Renesas Solutions Corp. | |
| 7 | * | |
| 1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 7fbeb642 PE |
9 | */ |
| 10 | ||
| 11 | #ifndef __RSK7264_H | |
| 12 | #define __RSK7264_H | |
| 13 | ||
| 7fbeb642 | 14 | #define CONFIG_CPU_SH7264 1 |
| efa4e1b9 | 15 | #define CONFIG_RSK7264 1 |
| 7fbeb642 | 16 | |
| 18a40e84 VZ |
17 | #define CONFIG_DISPLAY_BOARDINFO |
| 18 | ||
| efa4e1b9 | 19 | #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
| 7fbeb642 | 20 | |
| efa4e1b9 | 21 | #define CONFIG_SYS_LONGHELP 1 /* undef to save memory */ |
| 7fbeb642 | 22 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ |
| 7fbeb642 | 23 | |
| efa4e1b9 | 24 | /* Serial */ |
| 7fbeb642 PE |
25 | #define CONFIG_CONS_SCIF3 1 |
| 26 | ||
| efa4e1b9 PE |
27 | /* Memory */ |
| 28 | /* u-boot relocated to top 256KB of ram */ | |
| 29 | #define CONFIG_SYS_TEXT_BASE 0x0CFC0000 | |
| 30 | #define CONFIG_SYS_SDRAM_BASE 0x0C000000 | |
| 7fbeb642 PE |
31 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) |
| 32 | ||
| efa4e1b9 PE |
33 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 34 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) | |
| 7fbeb642 | 35 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
| efa4e1b9 PE |
36 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
| 37 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) | |
| 7fbeb642 | 38 | |
| efa4e1b9 | 39 | /* Flash */ |
| 7fbeb642 PE |
40 | #define CONFIG_FLASH_CFI_DRIVER |
| 41 | #define CONFIG_SYS_FLASH_CFI | |
| 42 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT | |
| efa4e1b9 | 43 | #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ |
| 7fbeb642 | 44 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| efa4e1b9 | 45 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
| 7fbeb642 | 46 | |
| efa4e1b9 PE |
47 | #define CONFIG_ENV_OFFSET (128 * 1024) |
| 48 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) | |
| 7fbeb642 PE |
49 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| 50 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
| 7fbeb642 PE |
51 | |
| 52 | /* Board Clock */ | |
| 117029c5 | 53 | #define CONFIG_SYS_CLK_FREQ 36000000 |
| 684a501e NI |
54 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 55 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ | |
| efa4e1b9 | 56 | #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ |
| 8f0960e8 | 57 | #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) |
| 7fbeb642 | 58 | |
| 7fbeb642 | 59 | #endif /* __RSK7264_H */ |