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99744b7e PE |
1 | /* |
2 | * Configuation settings for the Renesas RSK2+SH7269 board | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Electronics Europe Ltd. | |
5 | * Copyright (C) 2012 Phil Edworthy | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
99744b7e PE |
8 | */ |
9 | ||
10 | #ifndef __RSK7269_H | |
11 | #define __RSK7269_H | |
12 | ||
99744b7e PE |
13 | #define CONFIG_CPU_SH7269 1 |
14 | #define CONFIG_RSK7269 1 | |
15 | ||
18a40e84 VZ |
16 | #define CONFIG_DISPLAY_BOARDINFO |
17 | ||
99744b7e PE |
18 | #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
19 | ||
20 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
99744b7e | 21 | #define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ |
99744b7e PE |
22 | |
23 | /* Serial */ | |
99744b7e PE |
24 | #define CONFIG_CONS_SCIF7 |
25 | ||
26 | /* Memory */ | |
27 | /* u-boot relocated to top 256KB of ram */ | |
28 | #define CONFIG_SYS_TEXT_BASE 0x0DFC0000 | |
29 | #define CONFIG_SYS_SDRAM_BASE 0x0C000000 | |
30 | #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) | |
31 | ||
32 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
33 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) | |
34 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) | |
35 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) | |
36 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) | |
37 | ||
38 | /* NOR Flash */ | |
39 | #define CONFIG_FLASH_CFI_DRIVER | |
40 | #define CONFIG_SYS_FLASH_CFI | |
41 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT | |
42 | #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ | |
43 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
44 | #define CONFIG_SYS_MAX_FLASH_SECT 512 | |
45 | ||
99744b7e PE |
46 | #define CONFIG_ENV_OFFSET (128 * 1024) |
47 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) | |
48 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | |
49 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
50 | ||
51 | /* Board Clock */ | |
52 | #define CONFIG_SYS_CLK_FREQ 66125000 | |
684a501e NI |
53 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
54 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ | |
99744b7e | 55 | #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ |
8f0960e8 | 56 | #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) |
99744b7e PE |
57 | |
58 | /* Network interface */ | |
59 | #define CONFIG_SMC911X | |
60 | #define CONFIG_SMC911X_16_BIT | |
61 | #define CONFIG_SMC911X_BASE 0x24000000 | |
62 | ||
63 | #endif /* __RSK7269_H */ |