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2c1e11dd AY |
1 | /* |
2 | * (C) Copyright 2016 Rockchip Electronics Co., Ltd | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | #ifndef __CONFIG_RV1108_COMMON_H | |
7 | #define __CONFIG_RV1108_COMMON_H | |
8 | ||
9 | #include <asm/arch/hardware.h> | |
10 | #include "rockchip-common.h" | |
11 | ||
2c1e11dd | 12 | #define CONFIG_ENV_SIZE 0x2000 |
2c1e11dd AY |
13 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
14 | #define CONFIG_SYS_CBSIZE 1024 | |
15 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
16 | ||
17 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) | |
18 | /* TIMER1,initialized by ddr initialize code */ | |
19 | #define CONFIG_SYS_TIMER_BASE 0x10350020 | |
20 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) | |
21 | ||
22 | #define CONFIG_SYS_NS16550 | |
23 | #define CONFIG_SYS_NS16550_MEM32 | |
24 | ||
25 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 | |
26 | #define CONFIG_NR_DRAM_BANKS 1 | |
27 | #define CONFIG_SYS_TEXT_BASE CONFIG_SYS_SDRAM_BASE | |
28 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) | |
29 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) | |
30 | ||
31 | #endif |