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c474a8eb MK |
1 | /* |
2 | * Copyright (C) 2009 Samsung Electronics | |
3 | * Minkyu Kang <mk7.kang@samsung.com> | |
4 | * Kyungmin Park <kyungmin.park@samsung.com> | |
5 | * | |
6 | * Configuation settings for the SAMSUNG Universal (s5pc100) board. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __CONFIG_H | |
28 | #define __CONFIG_H | |
29 | ||
30 | /* High Level Configuration Options */ | |
c474a8eb | 31 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
889a275d | 32 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
c474a8eb MK |
33 | #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ |
34 | #define CONFIG_MACH_GONI 1 /* working with Goni */ | |
35 | ||
36 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
37 | ||
38 | #define CONFIG_ARCH_CPU_INIT | |
39 | #define CONFIG_DISPLAY_CPUINFO | |
40 | #define CONFIG_DISPLAY_BOARDINFO | |
41 | ||
c474a8eb MK |
42 | /* input clock of PLL: has 24MHz input clock at S5PC110 */ |
43 | #define CONFIG_SYS_CLK_FREQ_C110 24000000 | |
44 | ||
45 | /* DRAM Base */ | |
46 | #define CONFIG_SYS_SDRAM_BASE 0x30000000 | |
47 | ||
48 | #define CONFIG_SETUP_MEMORY_TAGS | |
49 | #define CONFIG_CMDLINE_TAG | |
50 | #define CONFIG_INITRD_TAG | |
51 | #define CONFIG_CMDLINE_EDITING | |
52 | ||
53 | /* | |
54 | * Size of malloc() pool | |
55 | * 1MB = 0x100000, 0x100000 = 1024 * 1024 | |
56 | */ | |
57 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) | |
c474a8eb MK |
58 | /* |
59 | * select serial console configuration | |
60 | */ | |
61 | #define CONFIG_SERIAL2 1 /* use SERIAL2 */ | |
62 | #define CONFIG_SERIAL_MULTI 1 | |
63 | #define CONFIG_BAUDRATE 115200 | |
64 | ||
87f314e9 | 65 | /* MMC */ |
7d2d58b4 JC |
66 | #define CONFIG_GENERIC_MMC |
67 | #define CONFIG_MMC | |
68 | #define CONFIG_SDHCI | |
69 | #define CONFIG_S5P_SDHCI | |
87f314e9 | 70 | |
96caf02f MK |
71 | /* PWM */ |
72 | #define CONFIG_PWM 1 | |
73 | ||
c474a8eb MK |
74 | /* It should define before config_cmd_default.h */ |
75 | #define CONFIG_SYS_NO_FLASH 1 | |
76 | ||
77 | /* Command definition */ | |
78 | #include <config_cmd_default.h> | |
79 | ||
80 | #undef CONFIG_CMD_FPGA | |
81 | #undef CONFIG_CMD_MISC | |
82 | #undef CONFIG_CMD_NET | |
83 | #undef CONFIG_CMD_NFS | |
84 | #undef CONFIG_CMD_XIMG | |
85 | #define CONFIG_CMD_CACHE | |
86 | #define CONFIG_CMD_REGINFO | |
87 | #define CONFIG_CMD_ONENAND | |
88 | #define CONFIG_CMD_MTDPARTS | |
87f314e9 | 89 | #define CONFIG_CMD_MMC |
c474a8eb MK |
90 | |
91 | #define CONFIG_BOOTDELAY 1 | |
92 | #define CONFIG_ZERO_BOOTDELAY_CHECK | |
93 | ||
94 | #define CONFIG_MTD_DEVICE | |
95 | #define CONFIG_MTD_PARTITIONS | |
96 | ||
97 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ | |
98 | #define MTDIDS_DEFAULT "onenand0=samsung-onenand" | |
99 | #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:1m(bootloader)"\ | |
100 | ",256k(params)"\ | |
101 | ",2816k(config)"\ | |
102 | ",8m(csa)"\ | |
103 | ",7m(kernel)"\ | |
104 | ",1m(log)"\ | |
105 | ",12m(modem)"\ | |
106 | ",60m(qboot)"\ | |
107 | ",-(UBI)\0" | |
108 | ||
109 | #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT | |
110 | ||
111 | #define CONFIG_BOOTCOMMAND "run ubifsboot" | |
112 | ||
113 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" | |
114 | ||
115 | #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ | |
116 | " ${console} ${meminfo}" | |
117 | ||
118 | #define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}" | |
119 | ||
120 | #define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \ | |
121 | " rootfstype=cramfs " CONFIG_COMMON_BOOT | |
122 | ||
123 | #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \ | |
124 | " onenand write 0x32008000 0x0 0x100000\0" | |
125 | ||
126 | #define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6" | |
127 | ||
128 | #define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc" | |
129 | ||
130 | #define CONFIG_ENV_OVERWRITE | |
131 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
132 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
133 | CONFIG_UPDATEB \ | |
134 | "updatek=" \ | |
135 | "onenand erase 0xc00000 0x600000;" \ | |
136 | "onenand write 0x31008000 0xc00000 0x600000\0" \ | |
137 | "updateu=" \ | |
138 | "onenand erase 0x01560000 0x1eaa0000;" \ | |
139 | "onenand write 0x32000000 0x1260000 0x8C0000\0" \ | |
140 | "bootk=" \ | |
141 | "onenand read 0x30007FC0 0xc00000 0x600000;" \ | |
142 | "bootm 0x30007FC0\0" \ | |
143 | "flashboot=" \ | |
144 | "set bootargs root=/dev/mtdblock${bootblock} " \ | |
145 | "rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \ | |
146 | "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \ | |
147 | "ubifsboot=" \ | |
148 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
149 | CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ | |
150 | CONFIG_COMMON_BOOT "; run bootk\0" \ | |
151 | "tftpboot=" \ | |
152 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
153 | CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ | |
154 | CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \ | |
155 | "bootm 0x30007FC0\0" \ | |
156 | "ramboot=" \ | |
157 | "set bootargs " CONFIG_RAMDISK_BOOT \ | |
158 | " initrd=0x33000000,8M ramdisk=8192\0" \ | |
159 | "mmcboot=" \ | |
160 | "set bootargs root=${mmcblk} rootfstype=${rootfstype}" \ | |
161 | CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ | |
162 | CONFIG_COMMON_BOOT "; run bootk\0" \ | |
163 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
164 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ | |
165 | "verify=n\0" \ | |
166 | "rootfstype=cramfs\0" \ | |
167 | "console=" CONFIG_DEFAULT_CONSOLE \ | |
168 | "mtdparts=" MTDPARTS_DEFAULT \ | |
169 | "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ | |
170 | "mmcblk=/dev/mmcblk1p1\0" \ | |
171 | "bootblock=9\0" \ | |
172 | "ubiblock=8\0" \ | |
173 | "ubi=enabled\0" \ | |
174 | "opts=always_resume=1" | |
175 | ||
176 | /* Miscellaneous configurable options */ | |
177 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
178 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
179 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
180 | #define CONFIG_SYS_PROMPT "Goni # " | |
181 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
182 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | |
183 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
184 | /* Boot Argument Buffer Size */ | |
185 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
186 | /* memtest works on */ | |
187 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
188 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) | |
189 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) | |
190 | ||
191 | #define CONFIG_SYS_HZ 1000 | |
192 | ||
193 | /* valid baudrates */ | |
194 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
195 | ||
196 | /* Stack sizes */ | |
197 | #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ | |
198 | ||
199 | /* Goni has 3 banks of DRAM, but swap the bank */ | |
200 | #define CONFIG_NR_DRAM_BANKS 3 | |
201 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ | |
202 | #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ | |
203 | #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ | |
204 | #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ | |
205 | #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ | |
206 | #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ | |
207 | ||
208 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
209 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ | |
210 | ||
211 | /* FLASH and environment organization */ | |
212 | #define CONFIG_ENV_IS_IN_ONENAND 1 | |
213 | #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB, 0x40000 */ | |
214 | #define CONFIG_ENV_ADDR (1 << 20) /* 1 MB, 0x100000 */ | |
215 | ||
216 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
217 | #define CONFIG_SAMSUNG_ONENAND 1 | |
218 | #define CONFIG_SYS_ONENAND_BASE 0xB0000000 | |
219 | ||
220 | #define CONFIG_DOS_PARTITION 1 | |
221 | ||
177feff3 MK |
222 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
223 | ||
7cb54948 ŁM |
224 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
225 | ||
2a7dd9d7 ŁM |
226 | #define CONFIG_PMIC |
227 | #define CONFIG_PMIC_I2C | |
228 | #define CONFIG_PMIC_MAX8998 | |
229 | ||
85776b02 ŁM |
230 | #include <asm/arch/gpio.h> |
231 | /* | |
232 | * I2C Settings | |
233 | */ | |
234 | #define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get_nr(j4, 3) | |
235 | #define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get_nr(j4, 0) | |
236 | ||
237 | #define CONFIG_SOFT_I2C 1 | |
238 | #define CONFIG_SYS_I2C_SPEED 50000 | |
239 | #define CONFIG_I2C_MULTI_BUS | |
240 | #define CONFIG_SYS_MAX_I2C_BUS 7 | |
a954da29 ŁM |
241 | #define CONFIG_USB_GADGET |
242 | #define CONFIG_USB_GADGET_S3C_UDC_OTG | |
243 | #define CONFIG_USB_GADGET_DUALSPEED | |
85776b02 | 244 | |
c474a8eb | 245 | #endif /* __CONFIG_H */ |