]>
Commit | Line | Data |
---|---|---|
83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
9e40808c MK |
2 | /* |
3 | * Copyright (C) 2010 Samsung Electronics | |
4 | * Minkyu Kang <mk7.kang@samsung.com> | |
5 | * | |
393cb361 | 6 | * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. |
9e40808c MK |
7 | */ |
8 | ||
3f41ffe4 PW |
9 | #ifndef __CONFIG_UNIVERSAL_H |
10 | #define __CONFIG_UNIVERSAL_H | |
9e40808c | 11 | |
4c7bb1d2 | 12 | #include <configs/exynos4-common.h> |
3f41ffe4 | 13 | |
3f41ffe4 | 14 | #define CONFIG_TIZEN /* TIZEN lib */ |
9e40808c MK |
15 | |
16 | /* Keep L2 Cache Disabled */ | |
e47f2db5 | 17 | #define CONFIG_SYS_L2CACHE_OFF 1 |
9e40808c | 18 | |
3f41ffe4 | 19 | /* Universal has 2 banks of DRAM */ |
9e40808c | 20 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
3f41ffe4 | 21 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
9e40808c | 22 | |
3f41ffe4 | 23 | #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ |
9e40808c | 24 | |
9e40808c | 25 | /* select serial console configuration */ |
3f41ffe4 PW |
26 | |
27 | /* Console configuration */ | |
3f41ffe4 | 28 | |
3f41ffe4 | 29 | #define CONFIG_BOOTCOMMAND "run mmcboot" |
767edf0f | 30 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" |
3f41ffe4 PW |
31 | |
32 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ | |
33 | - GENERATED_GBL_DATA_SIZE) | |
34 | ||
35 | #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ | |
36 | ||
37 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
38 | ||
39 | /* memtest works on */ | |
3f41ffe4 PW |
40 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) |
41 | ||
9e40808c | 42 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ |
43ede0bc TR |
43 | |
44 | #define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT | |
9e40808c MK |
45 | |
46 | #define MBRPARTS_DEFAULT "20M(permanent)"\ | |
47 | ",20M(boot)"\ | |
48 | ",1G(system)"\ | |
49 | ",100M(swap)"\ | |
50 | ",-(UMS)\0" | |
51 | ||
9e40808c MK |
52 | #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" |
53 | #define CONFIG_BOOTBLOCK "10" | |
54 | #define CONFIG_UBIBLOCK "9" | |
55 | ||
3f41ffe4 | 56 | #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV |
3f41ffe4 | 57 | |
9e40808c MK |
58 | #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " |
59 | #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ | |
60 | "${mtdparts}" | |
61 | ||
62 | #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" | |
63 | ||
9e40808c MK |
64 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
65 | "updateb=" \ | |
66 | "onenand erase 0x0 0x100000;" \ | |
67 | "onenand write 0x42008000 0x0 0x100000\0" \ | |
68 | "updatek=" \ | |
69 | "onenand erase 0xc00000 0x500000;" \ | |
70 | "onenand write 0x41008000 0xc00000 0x500000\0" \ | |
71 | "bootk=" \ | |
72 | "run loaduimage; bootm 0x40007FC0\0" \ | |
9e40808c | 73 | "updatebackup=" \ |
188c42b3 JC |
74 | "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ |
75 | "mmc dev 0 0\0" \ | |
9e40808c MK |
76 | "updatebootb=" \ |
77 | "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ | |
78 | "lpj=lpj=3981312\0" \ | |
79 | "ubifsboot=" \ | |
80 | "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ | |
81 | CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ | |
82 | CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ | |
83 | "tftpboot=" \ | |
84 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
85 | CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ | |
86 | CONFIG_ENV_COMMON_BOOT \ | |
87 | "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ | |
88 | "nfsboot=" \ | |
89 | "set bootargs root=/dev/nfs rw " \ | |
90 | "nfsroot=${nfsroot},nolock,tcp " \ | |
91 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ | |
92 | "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ | |
93 | "; run bootk\0" \ | |
94 | "ramfsboot=" \ | |
95 | "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ | |
96 | "${console} ${meminfo} " \ | |
97 | "initrd=0x43000000,8M ramdisk=8192\0" \ | |
98 | "mmcboot=" \ | |
99 | "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ | |
100 | "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ | |
101 | "run loaduimage; bootm 0x40007FC0\0" \ | |
102 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ | |
103 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
104 | "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ | |
105 | "verify=n\0" \ | |
106 | "rootfstype=ext4\0" \ | |
767edf0f | 107 | "console=" CONFIG_DEFAULT_CONSOLE \ |
43ede0bc | 108 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ |
9e40808c MK |
109 | "mbrparts=" MBRPARTS_DEFAULT \ |
110 | "meminfo=crashkernel=32M@0x50000000\0" \ | |
111 | "nfsroot=/nfsroot/arm\0" \ | |
112 | "bootblock=" CONFIG_BOOTBLOCK "\0" \ | |
113 | "ubiblock=" CONFIG_UBIBLOCK" \0" \ | |
114 | "ubi=enabled\0" \ | |
115 | "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ | |
116 | "mmcdev=0\0" \ | |
117 | "mmcbootpart=2\0" \ | |
118 | "mmcrootpart=3\0" \ | |
119 | "opts=always_resume=1" | |
120 | ||
9e40808c | 121 | #define CONFIG_USE_ONENAND_BOARD_INIT |
a08a649d | 122 | #define CONFIG_SAMSUNG_ONENAND |
9e40808c MK |
123 | #define CONFIG_SYS_ONENAND_BASE 0x0C000000 |
124 | ||
e30824f4 | 125 | #define CONFIG_USB_GADGET_DWC2_OTG_PHY |
ddc7e541 | 126 | |
ff0fedd5 PW |
127 | /* |
128 | * SPI Settings | |
129 | */ | |
130 | #define CONFIG_SOFT_SPI | |
0043b1fa | 131 | |
ff0fedd5 PW |
132 | #ifndef __ASSEMBLY__ |
133 | void universal_spi_scl(int bit); | |
134 | void universal_spi_sda(int bit); | |
135 | int universal_spi_read(void); | |
136 | #endif | |
137 | ||
679549d1 PM |
138 | /* Common misc for Samsung */ |
139 | #define CONFIG_MISC_COMMON | |
140 | ||
82b0a055 PM |
141 | /* Download menu - Samsung common */ |
142 | #define CONFIG_LCD_MENU | |
82b0a055 PM |
143 | |
144 | /* Download menu - definitions for check keys */ | |
145 | #ifndef __ASSEMBLY__ | |
82b0a055 PM |
146 | |
147 | #define KEY_PWR_PMIC_NAME "MAX8998_PMIC" | |
148 | #define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1 | |
149 | #define KEY_PWR_STATUS_MASK (1 << 7) | |
150 | #define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 | |
151 | #define KEY_PWR_INTERRUPT_MASK (1 << 7) | |
152 | ||
9b97b727 AS |
153 | #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 |
154 | #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 | |
82b0a055 PM |
155 | #endif /* __ASSEMBLY__ */ |
156 | ||
157 | /* LCD console */ | |
158 | #define LCD_BPP LCD_COLOR16 | |
82b0a055 | 159 | |
d984b9f8 PW |
160 | /* |
161 | * LCD Settings | |
162 | */ | |
2df21cb3 | 163 | #define CONFIG_BMP_16BPP |
d984b9f8 | 164 | #define CONFIG_LD9040 |
d984b9f8 | 165 | #define CONFIG_VIDEO_BMP_GZIP |
903afe18 | 166 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) |
d984b9f8 | 167 | |
9e40808c | 168 | #endif /* __CONFIG_H */ |