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1 | /* |
2 | * Configuration settings for the SAMA5D3 Xplained board. | |
3 | * | |
4 | * Copyright (C) 2014 Atmel Corporation | |
5 | * Bo Shen <voice.shen@atmel.com> | |
6 | * | |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
b2d387bc | 13 | #include "at91-sama5_common.h" |
7ca6f363 | 14 | |
7ca6f363 BS |
15 | /* |
16 | * This needs to be defined for the OHCI code to work but it is defined as | |
17 | * ATMEL_ID_UHPHS in the CPU specific header files. | |
18 | */ | |
19 | #define ATMEL_ID_UHP ATMEL_ID_UHPHS | |
20 | ||
21 | /* | |
22 | * Specify the clock enable bit in the PMC_SCER register. | |
23 | */ | |
24 | #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP | |
25 | ||
7ca6f363 BS |
26 | /* SDRAM */ |
27 | #define CONFIG_NR_DRAM_BANKS 1 | |
28 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS | |
29 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 | |
30 | ||
cd23aac4 | 31 | #ifdef CONFIG_SPL_BUILD |
1878804a | 32 | #define CONFIG_SYS_INIT_SP_ADDR 0x318000 |
cd23aac4 | 33 | #else |
7ca6f363 | 34 | #define CONFIG_SYS_INIT_SP_ADDR \ |
1878804a | 35 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
cd23aac4 | 36 | #endif |
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37 | |
38 | /* NAND flash */ | |
39 | #define CONFIG_CMD_NAND | |
40 | ||
41 | #ifdef CONFIG_CMD_NAND | |
42 | #define CONFIG_NAND_ATMEL | |
43 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
44 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
45 | /* our ALE is AD21 */ | |
46 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
47 | /* our CLE is AD22 */ | |
48 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
49 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
50 | /* PMECC & PMERRLOC */ | |
51 | #define CONFIG_ATMEL_NAND_HWECC | |
52 | #define CONFIG_ATMEL_NAND_HW_PMECC | |
53 | #define CONFIG_PMECC_CAP 4 | |
54 | #define CONFIG_PMECC_SECTOR_SIZE 512 | |
55 | #define CONFIG_CMD_NAND_TRIMFFS | |
56 | #define CONFIG_CMD_MTDPARTS | |
57 | ||
58 | #define CONFIG_MTD_DEVICE | |
59 | #define CONFIG_MTD_PARTITIONS | |
60 | #define CONFIG_RBTREE | |
61 | #define CONFIG_LZO | |
7ca6f363 BS |
62 | #define CONFIG_CMD_UBIFS |
63 | #endif | |
64 | ||
7ca6f363 | 65 | /* USB */ |
7ca6f363 BS |
66 | |
67 | #ifdef CONFIG_CMD_USB | |
68 | #define CONFIG_USB_ATMEL | |
69 | #define CONFIG_USB_ATMEL_CLK_SEL_UPLL | |
70 | #define CONFIG_USB_OHCI_NEW | |
71 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
72 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI | |
73 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" | |
74 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
7ca6f363 BS |
75 | #endif |
76 | ||
77 | #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) | |
7ca6f363 | 78 | #define CONFIG_FAT_WRITE |
7ca6f363 BS |
79 | #endif |
80 | ||
81 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ | |
82 | ||
83 | #if CONFIG_SYS_USE_NANDFLASH | |
dc018fef | 84 | /* override the bootcmd, bootargs and other configuration for nandflash env */ |
7ca6f363 | 85 | #elif CONFIG_SYS_USE_MMC |
372ca03f | 86 | /* override the bootcmd, bootargs and other configuration for sd/mmc env */ |
7ca6f363 BS |
87 | #else |
88 | #define CONFIG_ENV_IS_NOWHERE | |
89 | #endif | |
90 | ||
cd23aac4 | 91 | /* SPL */ |
cd23aac4 BS |
92 | #define CONFIG_SPL_FRAMEWORK |
93 | #define CONFIG_SPL_TEXT_BASE 0x300000 | |
1878804a | 94 | #define CONFIG_SPL_MAX_SIZE 0x18000 |
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95 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
96 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
97 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
98 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
99 | ||
cd23aac4 BS |
100 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
101 | ||
102 | #ifdef CONFIG_SYS_USE_MMC | |
993ea97e | 103 | #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds |
e2ccdf89 | 104 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
205b4f33 | 105 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
cd23aac4 BS |
106 | |
107 | #elif CONFIG_SYS_USE_NANDFLASH | |
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108 | #define CONFIG_SPL_NAND_DRIVERS |
109 | #define CONFIG_SPL_NAND_BASE | |
110 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 | |
111 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
112 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 | |
113 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
114 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
115 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 | |
116 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 | |
05a4d544 | 117 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER |
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118 | |
119 | #endif | |
120 | ||
7ca6f363 | 121 | #endif |