projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 7ca6f363 BS |
2 | /* |
| 3 | * Configuration settings for the SAMA5D3 Xplained board. | |
| 4 | * | |
| 5 | * Copyright (C) 2014 Atmel Corporation | |
| 6 | * Bo Shen <voice.shen@atmel.com> | |
| 7ca6f363 BS |
7 | */ |
| 8 | ||
| 9 | #ifndef __CONFIG_H | |
| 10 | #define __CONFIG_H | |
| 11 | ||
| df1cf775 | 12 | #include <linux/sizes.h> |
| b2d387bc | 13 | #include "at91-sama5_common.h" |
| 7ca6f363 | 14 | |
| 7ca6f363 BS |
15 | /* |
| 16 | * This needs to be defined for the OHCI code to work but it is defined as | |
| 17 | * ATMEL_ID_UHPHS in the CPU specific header files. | |
| 18 | */ | |
| e61ed48f | 19 | #define ATMEL_ID_UHP 32 |
| 7ca6f363 BS |
20 | |
| 21 | /* | |
| 22 | * Specify the clock enable bit in the PMC_SCER register. | |
| 23 | */ | |
| e61ed48f | 24 | #define ATMEL_PMC_UHP (1 << 6) |
| 7ca6f363 | 25 | |
| 7ca6f363 | 26 | /* SDRAM */ |
| e61ed48f | 27 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 7ca6f363 BS |
28 | #define CONFIG_SYS_SDRAM_SIZE 0x10000000 |
| 29 | ||
| cd23aac4 | 30 | #ifdef CONFIG_SPL_BUILD |
| 1878804a | 31 | #define CONFIG_SYS_INIT_SP_ADDR 0x318000 |
| cd23aac4 | 32 | #else |
| 7ca6f363 | 33 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 1878804a | 34 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
| cd23aac4 | 35 | #endif |
| 7ca6f363 BS |
36 | |
| 37 | /* NAND flash */ | |
| 7ca6f363 | 38 | #ifdef CONFIG_CMD_NAND |
| 7ca6f363 | 39 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| e61ed48f | 40 | #define CONFIG_SYS_NAND_BASE 0x60000000 |
| 7ca6f363 BS |
41 | /* our ALE is AD21 */ |
| 42 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 43 | /* our CLE is AD22 */ | |
| 44 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 8f1a80e9 | 45 | #endif |
| 7ca6f363 | 46 | |
| 7ca6f363 | 47 | /* USB */ |
| 7ca6f363 BS |
48 | #ifdef CONFIG_CMD_USB |
| 49 | #define CONFIG_USB_ATMEL | |
| 50 | #define CONFIG_USB_ATMEL_CLK_SEL_UPLL | |
| 51 | #define CONFIG_USB_OHCI_NEW | |
| 52 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
| e61ed48f | 53 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000 |
| 7ca6f363 BS |
54 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" |
| 55 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
| 7ca6f363 BS |
56 | #endif |
| 57 | ||
| cd23aac4 | 58 | /* SPL */ |
| 1878804a | 59 | #define CONFIG_SPL_MAX_SIZE 0x18000 |
| cd23aac4 BS |
60 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 61 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
| 62 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
| 63 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
| 64 | ||
| df1cf775 FL |
65 | /* size of u-boot.bin to load */ |
| 66 | #define CONFIG_SYS_MONITOR_LEN (2 * SZ_512K) | |
| cd23aac4 | 67 | |
| 5541543f | 68 | #ifdef CONFIG_SD_BOOT |
| 205b4f33 | 69 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
| 5541543f | 70 | #endif |
| cd23aac4 | 71 | |
| ea83ea5a MO |
72 | /* Falcon boot support on raw MMC */ |
| 73 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x100 /* 128 KiB */ | |
| 74 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) | |
| 75 | /* U-Boot proper stored by default at 0x200 (256 KiB) */ | |
| ea83ea5a MO |
76 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x22000000 |
| 77 | ||
| 78 | /* Falcon boot support on FAT on MMC */ | |
| 79 | #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" | |
| 80 | #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" | |
| 81 | ||
| 82 | /* Falcon boot support on raw NAND */ | |
| 83 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x1a0000 | |
| 84 | ||
| cd23aac4 | 85 | #endif |