projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| f196044d BS |
1 | /* |
| 2 | * Configuration settings for the SAMA5D4 Xplained ultra board. | |
| 3 | * | |
| 4 | * Copyright (C) 2014 Atmel | |
| 5 | * Bo Shen <voice.shen@atmel.com> | |
| 6 | * | |
| 7 | * SPDX-License-Identifier: GPL-2.0+ | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __CONFIG_H | |
| 11 | #define __CONFIG_H | |
| 12 | ||
| b2d387bc | 13 | #include "at91-sama5_common.h" |
| f196044d | 14 | |
| fafa4403 WY |
15 | #define CONFIG_MISC_INIT_R |
| 16 | ||
| f196044d BS |
17 | /* SDRAM */ |
| 18 | #define CONFIG_NR_DRAM_BANKS 1 | |
| e61ed48f | 19 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| f196044d BS |
20 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
| 21 | ||
| 0b2a9824 | 22 | #ifdef CONFIG_SPL_BUILD |
| 6dbadb4d | 23 | #define CONFIG_SYS_INIT_SP_ADDR 0x218000 |
| 0b2a9824 | 24 | #else |
| f196044d | 25 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 6dbadb4d | 26 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
| 0b2a9824 | 27 | #endif |
| f196044d BS |
28 | |
| 29 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ | |
| 30 | ||
| f196044d | 31 | #ifdef CONFIG_CMD_SF |
| f196044d BS |
32 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
| 33 | #endif | |
| 34 | ||
| 35 | /* NAND flash */ | |
| f196044d BS |
36 | #ifdef CONFIG_CMD_NAND |
| 37 | #define CONFIG_NAND_ATMEL | |
| 38 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| e61ed48f | 39 | #define CONFIG_SYS_NAND_BASE 0x80000000 |
| f196044d BS |
40 | /* our ALE is AD21 */ |
| 41 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 42 | /* our CLE is AD22 */ | |
| 43 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 44 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
| 45 | /* PMECC & PMERRLOC */ | |
| 46 | #define CONFIG_ATMEL_NAND_HWECC | |
| 47 | #define CONFIG_ATMEL_NAND_HW_PMECC | |
| 48 | #endif | |
| 49 | ||
| 0b2a9824 BS |
50 | /* SPL */ |
| 51 | #define CONFIG_SPL_FRAMEWORK | |
| 52 | #define CONFIG_SPL_TEXT_BASE 0x200000 | |
| 6dbadb4d | 53 | #define CONFIG_SPL_MAX_SIZE 0x18000 |
| 0b2a9824 BS |
54 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 55 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
| 56 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
| 57 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
| 58 | ||
| 0b2a9824 BS |
59 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 60 | ||
| 5541543f | 61 | #ifdef CONFIG_SD_BOOT |
| 0b2a9824 BS |
62 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
| 63 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
| 0b2a9824 BS |
64 | |
| 65 | #elif CONFIG_SYS_USE_NANDFLASH | |
| 5541543f WY |
66 | #elif CONFIG_SPI_BOOT |
| 67 | #define CONFIG_SPL_SPI_LOAD | |
| 68 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000 | |
| 69 | ||
| 70 | #elif CONFIG_NAND_BOOT | |
| 0b2a9824 BS |
71 | #define CONFIG_SPL_NAND_DRIVERS |
| 72 | #define CONFIG_SPL_NAND_BASE | |
| 5541543f | 73 | #endif |
| 0b2a9824 BS |
74 | #define CONFIG_PMECC_CAP 8 |
| 75 | #define CONFIG_PMECC_SECTOR_SIZE 512 | |
| 76 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 | |
| 77 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
| 78 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 | |
| 79 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
| 80 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
| 81 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 | |
| 82 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 | |
| 83 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER | |
| 84 | ||
| f196044d | 85 | #endif |