projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 927b901b BS |
1 | /* |
| 2 | * Configuration settings for the SAMA5D4EK board. | |
| 3 | * | |
| 4 | * Copyright (C) 2014 Atmel | |
| 5 | * Bo Shen <voice.shen@atmel.com> | |
| 6 | * | |
| 7 | * SPDX-License-Identifier: GPL-2.0+ | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __CONFIG_H | |
| 11 | #define __CONFIG_H | |
| 12 | ||
| b2d387bc | 13 | #include "at91-sama5_common.h" |
| 927b901b | 14 | |
| 927b901b BS |
15 | /* SDRAM */ |
| 16 | #define CONFIG_NR_DRAM_BANKS 1 | |
| e61ed48f | 17 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 927b901b BS |
18 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
| 19 | ||
| 5a4c9c22 | 20 | #ifdef CONFIG_SPL_BUILD |
| ef33aa3d | 21 | #define CONFIG_SYS_INIT_SP_ADDR 0x218000 |
| 5a4c9c22 | 22 | #else |
| 927b901b | 23 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| ef33aa3d | 24 | (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
| 5a4c9c22 | 25 | #endif |
| 927b901b BS |
26 | |
| 27 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ | |
| 28 | ||
| 927b901b | 29 | #ifdef CONFIG_CMD_SF |
| 927b901b BS |
30 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
| 31 | #endif | |
| 32 | ||
| 33 | /* NAND flash */ | |
| 927b901b BS |
34 | #ifdef CONFIG_CMD_NAND |
| 35 | #define CONFIG_NAND_ATMEL | |
| 36 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| e61ed48f | 37 | #define CONFIG_SYS_NAND_BASE 0x80000000 |
| 927b901b BS |
38 | /* our ALE is AD21 */ |
| 39 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 40 | /* our CLE is AD22 */ | |
| 41 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 42 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
| 43 | /* PMECC & PMERRLOC */ | |
| 44 | #define CONFIG_ATMEL_NAND_HWECC | |
| 45 | #define CONFIG_ATMEL_NAND_HW_PMECC | |
| 46 | #endif | |
| 47 | ||
| 5a4c9c22 BS |
48 | /* SPL */ |
| 49 | #define CONFIG_SPL_FRAMEWORK | |
| 50 | #define CONFIG_SPL_TEXT_BASE 0x200000 | |
| ef33aa3d | 51 | #define CONFIG_SPL_MAX_SIZE 0x18000 |
| 5a4c9c22 BS |
52 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 53 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
| 54 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
| 55 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
| 56 | ||
| 5a4c9c22 BS |
57 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 58 | ||
| 5541543f | 59 | #ifdef CONFIG_SD_BOOT |
| 5a4c9c22 BS |
60 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
| 61 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
| 5a4c9c22 | 62 | |
| 5541543f WY |
63 | #elif CONFIG_SPI_BOOT |
| 64 | #define CONFIG_SPL_SPI_LOAD | |
| 65 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000 | |
| 66 | ||
| 67 | #elif CONFIG_NAND_BOOT | |
| 5a4c9c22 BS |
68 | #define CONFIG_SPL_NAND_DRIVERS |
| 69 | #define CONFIG_SPL_NAND_BASE | |
| 5541543f | 70 | #endif |
| 5a4c9c22 BS |
71 | #define CONFIG_PMECC_CAP 8 |
| 72 | #define CONFIG_PMECC_SECTOR_SIZE 512 | |
| 73 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 | |
| 74 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
| 75 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 | |
| 76 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
| 77 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
| 78 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 | |
| 79 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 | |
| 80 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER | |
| 81 | ||
| 927b901b | 82 | #endif |