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4e3349b6 MV |
1 | /* |
2 | * SchulerControl GmbH, SC_SPS_1 module config | |
3 | * | |
4 | * Copyright (C) 2012 Marek Vasut <marex@denx.de> | |
5 | * on behalf of DENX Software Engineering GmbH | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License as | |
9 | * published by the Free Software Foundation; either version 2 of | |
10 | * the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
20 | * MA 02111-1307 USA | |
21 | */ | |
22 | #ifndef __SC_SPS_1_H__ | |
23 | #define __SC_SPS_1_H__ | |
24 | ||
4e3349b6 MV |
25 | /* |
26 | * SoC configurations | |
27 | */ | |
28 | #define CONFIG_MX28 /* i.MX28 SoC */ | |
29 | #define CONFIG_MXS_GPIO /* GPIO control */ | |
30 | #define CONFIG_SYS_HZ 1000 /* Ticks per second */ | |
31 | ||
32 | /* | |
33 | * Define SC_SPS_1 machine type by hand until it lands in mach-types | |
34 | */ | |
35 | #define MACH_TYPE_SC_SPS_1 4172 | |
36 | ||
37 | #define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1 | |
38 | ||
e229d445 OS |
39 | #include <asm/arch/regs-base.h> |
40 | ||
4e3349b6 | 41 | #define CONFIG_SYS_NO_FLASH |
4e3349b6 MV |
42 | #define CONFIG_BOARD_EARLY_INIT_F |
43 | #define CONFIG_ARCH_CPU_INIT | |
44 | #define CONFIG_ARCH_MISC_INIT | |
45 | ||
46 | #define CONFIG_ENV_IS_IN_MMC | |
47 | ||
48 | #define CONFIG_OF_LIBFDT | |
49 | ||
50 | /* | |
51 | * SPL | |
52 | */ | |
53 | #define CONFIG_SPL | |
54 | #define CONFIG_SPL_NO_CPU_SUPPORT_CODE | |
38d4a604 OS |
55 | #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" |
56 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" | |
4e3349b6 MV |
57 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
58 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
59 | #define CONFIG_SPL_GPIO_SUPPORT | |
60 | ||
61 | /* | |
62 | * U-Boot Commands | |
63 | */ | |
64 | #include <config_cmd_default.h> | |
65 | #define CONFIG_DISPLAY_CPUINFO | |
66 | #define CONFIG_DOS_PARTITION | |
67 | ||
68 | #define CONFIG_CMD_CACHE | |
69 | #define CONFIG_CMD_DHCP | |
70 | #define CONFIG_CMD_EXT2 | |
71 | #define CONFIG_CMD_FAT | |
72 | #define CONFIG_CMD_GPIO | |
73 | #define CONFIG_CMD_MII | |
74 | #define CONFIG_CMD_MMC | |
75 | #define CONFIG_CMD_NET | |
76 | #define CONFIG_CMD_NFS | |
77 | #define CONFIG_CMD_PING | |
78 | #define CONFIG_CMD_SETEXPR | |
79 | #define CONFIG_CMD_USB | |
80 | ||
81 | /* | |
82 | * Memory configurations | |
83 | */ | |
84 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
85 | #define PHYS_SDRAM_1 0x40000000 /* Base address */ | |
86 | #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ | |
87 | #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */ | |
88 | #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ | |
89 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ | |
90 | #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ | |
91 | #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ | |
92 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
93 | ||
94 | /* Point initial SP in SRAM so SPL can use it too. */ | |
95 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 | |
96 | #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) | |
97 | ||
98 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
99 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
100 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
101 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
102 | /* | |
103 | * We need to sacrifice first 4 bytes of RAM here to avoid triggering some | |
104 | * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot | |
105 | * binary. In case there was more of this mess, 0x100 bytes are skipped. | |
106 | */ | |
107 | #define CONFIG_SYS_TEXT_BASE 0x40000100 | |
108 | ||
109 | /* | |
110 | * U-Boot general configurations | |
111 | */ | |
112 | #define CONFIG_SYS_LONGHELP | |
113 | #define CONFIG_SYS_PROMPT "=> " | |
114 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ | |
115 | #define CONFIG_SYS_PBSIZE \ | |
116 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
117 | /* Print buffer size */ | |
118 | #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ | |
119 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
120 | /* Boot argument buffer size */ | |
121 | #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ | |
122 | #define CONFIG_AUTO_COMPLETE /* Command auto complete */ | |
123 | #define CONFIG_CMDLINE_EDITING /* Command history etc */ | |
124 | #define CONFIG_SYS_HUSH_PARSER | |
125 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
126 | ||
127 | /* | |
128 | * Serial Driver | |
129 | */ | |
130 | #define CONFIG_PL011_SERIAL | |
131 | #define CONFIG_PL011_CLOCK 24000000 | |
132 | #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } | |
133 | #define CONFIG_CONS_INDEX 0 | |
134 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
135 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
136 | ||
137 | /* | |
138 | * MMC Driver | |
139 | */ | |
140 | #ifdef CONFIG_CMD_MMC | |
141 | #define CONFIG_APBH_DMA | |
142 | #define CONFIG_MMC | |
640fb607 | 143 | #define CONFIG_BOUNCE_BUFFER |
4e3349b6 MV |
144 | #define CONFIG_GENERIC_MMC |
145 | #define CONFIG_MXS_MMC | |
146 | #endif | |
147 | #define CONFIG_ENV_SIZE (16 * 1024) | |
148 | #ifdef CONFIG_ENV_IS_IN_MMC | |
149 | #define CONFIG_ENV_OFFSET (256 * 1024) | |
150 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
151 | #else | |
152 | #define CONFIG_ENV_IS_NOWHERE | |
153 | #endif | |
154 | ||
155 | /* | |
156 | * Ethernet on SOC (FEC) | |
157 | */ | |
158 | #ifdef CONFIG_CMD_NET | |
159 | #define CONFIG_ETHPRIME "FEC0" | |
160 | #define CONFIG_FEC_MXC | |
4e3349b6 | 161 | #define CONFIG_MII |
4e3349b6 MV |
162 | #define CONFIG_FEC_XCV_TYPE RMII |
163 | #define CONFIG_PHYLIB | |
164 | #define CONFIG_PHY_SMSC | |
165 | #endif | |
166 | ||
167 | /* | |
168 | * USB | |
169 | */ | |
170 | #ifdef CONFIG_CMD_USB | |
171 | #define CONFIG_USB_EHCI | |
172 | #define CONFIG_USB_EHCI_MXS | |
afa87210 MV |
173 | #define CONFIG_EHCI_MXS_PORT0 |
174 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 | |
4e3349b6 MV |
175 | #define CONFIG_EHCI_IS_TDI |
176 | #define CONFIG_USB_STORAGE | |
177 | #endif | |
178 | ||
179 | /* | |
180 | * Boot Linux | |
181 | */ | |
182 | #define CONFIG_CMDLINE_TAG | |
183 | #define CONFIG_SETUP_MEMORY_TAGS | |
184 | #define CONFIG_BOOTDELAY 3 | |
185 | #define CONFIG_BOOTFILE "uImage" | |
186 | #define CONFIG_BOOTARGS "console=ttyAMA0,115200" | |
187 | #define CONFIG_BOOTCOMMAND "bootm " | |
188 | #define CONFIG_LOADADDR 0x42000000 | |
189 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
190 | ||
191 | /* | |
192 | * Extra Environments | |
193 | */ | |
194 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
195 | "update_sd_firmware_filename=u-boot.sd\0" \ | |
196 | "update_sd_firmware=" /* Update the SD firmware partition */ \ | |
197 | "if mmc rescan ; then " \ | |
198 | "if tftp ${update_sd_firmware_filename} ; then " \ | |
199 | "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \ | |
200 | "setexpr fw_sz ${fw_sz} + 1 ; " \ | |
201 | "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \ | |
202 | "fi ; " \ | |
203 | "fi\0" | |
204 | ||
205 | #endif /* __SC_SPS_1_H__ */ |