[people/ms/u-boot.git] / include / configs / seaboard.h

/*
 *  (C) Copyright 2010,2011
 *  NVIDIA Corporation <www.nvidia.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/sizes.h>

/* LP0 suspend / resume */
#define CONFIG_TEGRA2_LP0
#define CONFIG_AES
#define CONFIG_TEGRA_PMU
#define CONFIG_TPS6586X_POWER
#define CONFIG_TEGRA_CLOCK_SCALING

#include "tegra2-common.h"

/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
#define CONFIG_DEFAULT_DEVICE_TREE	tegra2-seaboard
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE

/* High-level configuration options */
#define V_PROMPT		"Tegra2 (SeaBoard) # "
#define CONFIG_TEGRA2_BOARD_STRING	"NVIDIA Seaboard"

/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
#define CONFIG_TEGRA2_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTD_BASE

/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
#define CONFIG_UART_DISABLE_GPIO	GPIO_PI3
/*
 * On Seaboard, SPIFLASH is muxed with UART4. The next 5 defines are
 * needed to work around that design error.
 */
#define CONFIG_SPI_UART_SWITCH
#define CONFIG_SPI_CORRUPTS_UART	NV_PA_APB_UARTD_BASE
#define CONFIG_SPI_CORRUPTS_UART_NR	3
#define CONFIG_SPI_CORRUPTS_UART_DLY	2500
#undef CONFIG_CMDLINE_EDITING		/* avoid NUL in input buffer */

#define CONFIG_MACH_TYPE		MACH_TYPE_SEABOARD
#define CONFIG_SYS_BOARD_ODMDATA	0x300d8011 /* lp1, 1GB */

#define CONFIG_BOARD_EARLY_INIT_F

/* SPI */
#define CONFIG_TEGRA_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SIZE		(4 << 20)

/* I2C */
#define CONFIG_TEGRA_I2C
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS		4
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_CMD_I2C

/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC

#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT

/* Environment in SPI */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_MAX_HZ		48000000
#define CONFIG_ENV_SPI_MODE		SPI_MODE_0

#define CONFIG_ENV_SECT_SIZE    CONFIG_ENV_SIZE
#define CONFIG_ENV_OFFSET       (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)

/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB

/* USB networking support */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

/* General networking support */
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP

/* Enable keyboard */
#define CONFIG_TEGRA2_KEYBOARD
#define CONFIG_KEYBOARD

#undef TEGRA2_DEVICE_SETTINGS
#define TEGRA2_DEVICE_SETTINGS	"stdin=serial,tegra-kbc\0" \
					"stdout=serial\0" \
					"stderr=serial\0"

#include "tegra2-common-post.h"

#endif /* __CONFIG_H */
Commit	Line	Data
ee4bbbcb TW	1	/*
	2	* (C) Copyright 2010,2011
	3	* NVIDIA Corporation <www.nvidia.com>
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#ifndef __CONFIG_H
	25	#define __CONFIG_H
	26
	27	#include <asm/sizes.h>
649d0ffb SG	28
	29	/* LP0 suspend / resume */
	30	#define CONFIG_TEGRA2_LP0
	31	#define CONFIG_AES
	32	#define CONFIG_TEGRA_PMU
	33	#define CONFIG_TPS6586X_POWER
	34	#define CONFIG_TEGRA_CLOCK_SCALING
	35
ee4bbbcb TW	36	#include "tegra2-common.h"
ee4bbbcb TW	37
d9fdfe0a SG	38	/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
	39	#define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard
	40	#define CONFIG_OF_CONTROL
	41	#define CONFIG_OF_SEPARATE
	42
ee4bbbcb	43	/* High-level configuration options */
ee4bbbcb TW	44	#define V_PROMPT "Tegra2 (SeaBoard) # "
	45	#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard"
	46
	47	/* Board-specific serial config */
	48	#define CONFIG_SERIAL_MULTI
	49	#define CONFIG_TEGRA2_ENABLE_UARTD
	50	#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
	51
bf80088a SG	52	/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
bf80088a SG	53	#define CONFIG_UART_DISABLE_GPIO GPIO_PI3
046c76a6 TW	54	/*
	55	* On Seaboard, SPIFLASH is muxed with UART4. The next 5 defines are
	56	* needed to work around that design error.
	57	*/
	58	#define CONFIG_SPI_UART_SWITCH
	59	#define CONFIG_SPI_CORRUPTS_UART NV_PA_APB_UARTD_BASE
	60	#define CONFIG_SPI_CORRUPTS_UART_NR 3
	61	#define CONFIG_SPI_CORRUPTS_UART_DLY 2500
	62	#undef CONFIG_CMDLINE_EDITING /* avoid NUL in input buffer */
bf80088a	63
05858736	64	#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
ee4bbbcb TW	65	#define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */
ee4bbbcb TW	66
74652cf6	67	#define CONFIG_BOARD_EARLY_INIT_F
83800959	68
bf80088a	69	/* SPI */
edffa63d	70	#define CONFIG_TEGRA_SPI
bf80088a SG	71	#define CONFIG_SPI_FLASH
	72	#define CONFIG_SPI_FLASH_WINBOND
	73	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	74	#define CONFIG_CMD_SPI
	75	#define CONFIG_CMD_SF
9dd79fdb	76	#define CONFIG_SPI_FLASH_SIZE (4 << 20)
bf80088a	77
905fe99b SG	78	/* I2C */
	79	#define CONFIG_TEGRA_I2C
	80	#define CONFIG_SYS_I2C_INIT_BOARD
	81	#define CONFIG_I2C_MULTI_BUS
	82	#define CONFIG_SYS_MAX_I2C_BUS 4
	83	#define CONFIG_SYS_I2C_SPEED 100000
	84	#define CONFIG_CMD_I2C
	85
83800959 TW	86	/* SD/MMC */
	87	#define CONFIG_MMC
	88	#define CONFIG_GENERIC_MMC
3f82d89d	89	#define CONFIG_TEGRA_MMC
83800959 TW	90	#define CONFIG_CMD_MMC
	91
	92	#define CONFIG_DOS_PARTITION
	93	#define CONFIG_EFI_PARTITION
	94	#define CONFIG_CMD_EXT2
	95	#define CONFIG_CMD_FAT
9dd79fdb SG	96
	97	/* Environment in SPI */
	98	#define CONFIG_ENV_IS_IN_SPI_FLASH
	99	#define CONFIG_ENV_SPI_MAX_HZ 48000000
	100	#define CONFIG_ENV_SPI_MODE SPI_MODE_0
	101
	102	#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
	103	#define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
db44ebdb SG	104
	105	/* USB Host support */
	106	#define CONFIG_USB_EHCI
	107	#define CONFIG_USB_EHCI_TEGRA
	108	#define CONFIG_USB_STORAGE
	109	#define CONFIG_CMD_USB
	110
defd5e49 SW	111	/* USB networking support */
defd5e49 SW	112	#define CONFIG_USB_HOST_ETHER
defd5e49 SW	113	#define CONFIG_USB_ETHER_ASIX
	114
	115	/* General networking support */
	116	#define CONFIG_CMD_NET
	117	#define CONFIG_CMD_DHCP
	118
2cacf516 SG	119	/* Enable keyboard */
	120	#define CONFIG_TEGRA2_KEYBOARD
	121	#define CONFIG_KEYBOARD
	122
	123	#undef TEGRA2_DEVICE_SETTINGS
	124	#define TEGRA2_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
	125	"stdout=serial\0" \
	126	"stderr=serial\0"
bea2674c SW	127
	128	#include "tegra2-common-post.h"
	129
ee4bbbcb	130	#endif /* __CONFIG_H */