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1 | /* |
2 | * Configuation settings for the Renesas Technology R0P7785LC0011RL board | |
3 | * | |
4 | * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | |
5 | * | |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #ifndef __SH7785LCR_H | |
26 | #define __SH7785LCR_H | |
27 | ||
28 | #undef DEBUG | |
29 | #define CONFIG_SH 1 | |
30 | #define CONFIG_SH4A 1 | |
31 | #define CONFIG_CPU_SH7785 1 | |
32 | #define CONFIG_SH7785LCR 1 | |
33 | ||
34 | #define CONFIG_CMD_FLASH | |
35 | #define CONFIG_CMD_MEMORY | |
36 | #define CONFIG_CMD_PCI | |
37 | #define CONFIG_CMD_NET | |
38 | #define CONFIG_CMD_PING | |
39 | #define CONFIG_CMD_NFS | |
40 | #define CONFIG_CMD_DFL | |
41 | #define CONFIG_CMD_SDRAM | |
42 | #define CONFIG_CMD_RUN | |
43 | #define CONFIG_CMD_ENV | |
44 | ||
45 | #define CONFIG_CMD_USB | |
46 | #define CONFIG_USB_STORAGE | |
47 | #define CONFIG_CMD_EXT2 | |
48 | #define CONFIG_CMD_FAT | |
49 | #define CONFIG_DOS_PARTITION | |
50 | #define CONFIG_MAC_PARTITION | |
51 | ||
52 | #define CONFIG_BAUDRATE 115200 | |
53 | #define CONFIG_BOOTDELAY 3 | |
54 | #define CONFIG_BOOTARGS "console=ttySC1,115200 root=/dev/nfs ip=dhcp" | |
55 | ||
56 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
57 | "bootdevice=0:1\0" \ | |
58 | "usbload=usb reset;usbboot;usb stop;bootm\0" | |
59 | ||
60 | #define CONFIG_VERSION_VARIABLE | |
61 | #undef CONFIG_SHOW_BOOT_PROGRESS | |
62 | ||
63 | /* MEMORY */ | |
64 | #define SH7785LCR_SDRAM_BASE (0x08000000) | |
65 | #define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024) | |
66 | #define SH7785LCR_FLASH_BASE_1 (0xa0000000) | |
67 | #define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) | |
68 | #define SH7785LCR_USB_BASE (0xb4000000) | |
69 | ||
70 | #define CFG_LONGHELP | |
71 | #define CFG_PROMPT "=> " | |
72 | #define CFG_CBSIZE 256 | |
73 | #define CFG_PBSIZE 256 | |
74 | #define CFG_MAXARGS 16 | |
75 | #define CFG_BARGSIZE 512 | |
76 | #define CFG_BAUDRATE_TABLE { 115200 } | |
77 | ||
78 | /* SCIF */ | |
1c98172e | 79 | #define CONFIG_SCIF_CONSOLE 1 |
0d53a47d NI |
80 | #define CONFIG_CONS_SCIF1 1 |
81 | #define CONFIG_SCIF_EXT_CLOCK 1 | |
82 | #undef CFG_CONSOLE_INFO_QUIET | |
83 | #undef CFG_CONSOLE_OVERWRITE_ROUTINE | |
84 | #undef CFG_CONSOLE_ENV_OVERWRITE | |
85 | ||
86 | ||
87 | #define CFG_MEMTEST_START (SH7785LCR_SDRAM_BASE) | |
88 | #define CFG_MEMTEST_END (CFG_MEMTEST_START + \ | |
89 | (SH7785LCR_SDRAM_SIZE) - \ | |
90 | 4 * 1024 * 1024) | |
91 | #undef CFG_ALT_MEMTEST | |
92 | #undef CFG_MEMTEST_SCRATCH | |
93 | #undef CFG_LOADS_BAUD_CHANGE | |
94 | ||
95 | #define CFG_SDRAM_BASE (SH7785LCR_SDRAM_BASE) | |
96 | #define CFG_SDRAM_SIZE (SH7785LCR_SDRAM_SIZE) | |
97 | #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 16 * 1024 * 1024) | |
98 | ||
99 | #define CFG_MONITOR_BASE (SH7785LCR_FLASH_BASE_1) | |
100 | #define CFG_MONITOR_LEN (512 * 1024) | |
101 | #define CFG_MALLOC_LEN (512 * 1024) | |
102 | #define CFG_GBL_DATA_SIZE (256) | |
103 | #define CFG_BOOTMAPSZ (8 * 1024 * 1024) | |
104 | ||
105 | /* FLASH */ | |
1c98172e | 106 | #define CONFIG_FLASH_CFI_DRIVER |
0d53a47d | 107 | #define CFG_FLASH_CFI |
0d53a47d NI |
108 | #undef CFG_FLASH_QUIET_TEST |
109 | #define CFG_FLASH_EMPTY_INFO | |
110 | #define CFG_FLASH_BASE (SH7785LCR_FLASH_BASE_1) | |
111 | #define CFG_MAX_FLASH_SECT 512 | |
112 | ||
113 | #define CFG_MAX_FLASH_BANKS 1 | |
114 | #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE + \ | |
115 | (0 * SH7785LCR_FLASH_BANK_SIZE) } | |
116 | ||
117 | #define CFG_FLASH_ERASE_TOUT (3 * 1000) | |
118 | #define CFG_FLASH_WRITE_TOUT (3 * 1000) | |
119 | #define CFG_FLASH_LOCK_TOUT (3 * 1000) | |
120 | #define CFG_FLASH_UNLOCK_TOUT (3 * 1000) | |
121 | ||
122 | #undef CFG_FLASH_PROTECTION | |
123 | #undef CFG_DIRECT_FLASH_TFTP | |
124 | ||
125 | /* R8A66597 */ | |
126 | #define LITTLEENDIAN /* for include/usb.h */ | |
127 | #define CONFIG_USB_R8A66597_HCD | |
128 | #define CONFIG_R8A66597_BASE_ADDR SH7785LCR_USB_BASE | |
129 | #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ | |
130 | #define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ | |
131 | #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ | |
132 | ||
133 | /* PCI Controller */ | |
134 | #define CONFIG_PCI | |
135 | #define CONFIG_SH4_PCI | |
136 | #define CONFIG_SH7780_PCI | |
137 | #define CONFIG_PCI_PNP | |
138 | #define CONFIG_PCI_SCAN_SHOW 1 | |
139 | ||
140 | #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ | |
141 | #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS | |
142 | #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ | |
143 | ||
144 | #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ | |
145 | #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS | |
146 | #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ | |
147 | ||
148 | /* Network device (RTL8169) support */ | |
149 | #define CONFIG_NET_MULTI | |
150 | #define CONFIG_RTL8169 | |
151 | ||
152 | /* ENV setting */ | |
153 | #define CFG_ENV_IS_IN_FLASH | |
154 | #define CONFIG_ENV_OVERWRITE 1 | |
155 | #define CFG_ENV_SECT_SIZE (256 * 1024) | |
156 | #define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) | |
157 | #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) | |
158 | #define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE) | |
159 | #define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE) | |
160 | ||
161 | /* Board Clock */ | |
162 | /* The SCIF used external clock. system clock only used timer. */ | |
163 | #define CONFIG_SYS_CLK_FREQ 50000000 | |
164 | #define TMU_CLK_DIVIDER 4 | |
165 | #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) | |
166 | ||
167 | #endif /* __SH7785LCR_H */ |