]>
Commit | Line | Data |
---|---|---|
6b7c0f5e | 1 | /* |
a972089a | 2 | * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR) |
6b7c0f5e | 3 | * |
a972089a | 4 | * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
6b7c0f5e NI |
5 | * |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #ifndef __SHMIN_H | |
26 | #define __SHMIN_H | |
27 | ||
28 | #define CONFIG_SH 1 | |
29 | #define CONFIG_SH3 1 | |
30 | #define CONFIG_CPU_SH7706 1 | |
a972089a | 31 | /* T-SH7706LAN */ |
6b7c0f5e | 32 | #define CONFIG_SHMIN 1 |
a972089a NI |
33 | /* T-SH7706LSR*/ |
34 | /* #define CONFIG_T_SH7706LSR 1 */ | |
6b7c0f5e NI |
35 | |
36 | #define CONFIG_CMD_FLASH | |
37 | #define CONFIG_CMD_MEMORY | |
38 | #define CONFIG_CMD_SDRAM | |
39 | #define CONFIG_CMD_NET | |
40 | #define CONFIG_CMD_PING | |
41 | #define CONFIG_CMD_NFS | |
42 | #define CONFIG_CMD_ENV | |
43 | #define CONFIG_CMD_SAVEENV | |
44 | ||
45 | #define CONFIG_BAUDRATE 115200 | |
46 | #define CONFIG_BOOTARGS "console=ttySC0,115200" | |
47 | ||
d1a24f06 | 48 | /* |
6b7c0f5e NI |
49 | * This board has original boot loader. If you write u-boot to 0x0, |
50 | * you should set undef. | |
51 | */ | |
52 | #define CONFIG_VERSION_VARIABLE | |
53 | #undef CONFIG_SHOW_BOOT_PROGRESS | |
54 | ||
55 | /* system */ | |
56 | #define SHMIN_SDRAM_BASE (0x8C000000) | |
57 | #define SHMIN_FLASH_BASE_1 (0xA0000000) | |
58 | ||
a8d954ba | 59 | #define CONFIG_SYS_TEXT_BASE 0x8DFB0000 |
6b7c0f5e NI |
60 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
61 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
62 | #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ | |
63 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ | |
64 | #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ | |
65 | /* Buffer size for Boot Arguments passed to kernel */ | |
66 | #define CONFIG_SYS_BARGSIZE 512 | |
67 | /* List of legal baudrate settings for this board */ | |
a972089a | 68 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 } |
6b7c0f5e NI |
69 | |
70 | /* SCIF */ | |
71 | #define CONFIG_SCIF_CONSOLE 1 | |
72 | #define CONFIG_CONS_SCIF0 1 | |
73 | ||
74 | /* memory */ | |
75 | #define CONFIG_SYS_SDRAM_BASE SHMIN_SDRAM_BASE | |
76 | #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) | |
77 | #define CONFIG_SYS_MEMTEST_START SHMIN_SDRAM_BASE | |
78 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024)) | |
79 | ||
80 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024) | |
81 | #define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE) | |
82 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) | |
83 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) | |
84 | #define CONFIG_SYS_GBL_DATA_SIZE 256 | |
85 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) | |
86 | ||
87 | /* FLASH */ | |
88 | #define CONFIG_SYS_FLASH_CFI | |
89 | #define CONFIG_FLASH_CFI_DRIVER | |
90 | #undef CONFIG_SYS_FLASH_QUIET_TEST | |
91 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ | |
92 | #define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1 | |
93 | #define CONFIG_SYS_MAX_FLASH_SECT 11 | |
94 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
95 | ||
96 | #define CONFIG_FLASH_CFI_LEGACY | |
97 | #define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_FLASH_BASE | |
98 | #define CONFIG_SYS_ATMEL_TOTALSECT CONFIG_SYS_MAX_FLASH_SECT | |
99 | #define CONFIG_SYS_ATMEL_REGION 4 | |
100 | #define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7} | |
101 | #define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000} | |
102 | ||
103 | #define CONFIG_ENV_IS_IN_FLASH | |
104 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | |
105 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
a972089a NI |
106 | |
107 | #ifdef CONFIG_T_SH7706LSR | |
108 | #define CONFIG_ENV_ADDR (SHMIN_FLASH_BASE_1 + 70000) | |
109 | #else | |
6b7c0f5e | 110 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
a972089a NI |
111 | #endif |
112 | ||
6b7c0f5e NI |
113 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 |
114 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 | |
115 | ||
116 | /* Board Clock */ | |
a972089a NI |
117 | #ifdef CONFIG_T_SH7706LSR |
118 | #define CONFIG_SYS_CLK_FREQ 40000000 | |
119 | #else | |
6b7c0f5e | 120 | #define CONFIG_SYS_CLK_FREQ 33333333 |
a972089a | 121 | #endif /* CONFIG_T_SH7706LSR */ |
6b7c0f5e NI |
122 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
123 | #define CONFIG_SYS_HZ 1000 | |
124 | ||
125 | /* Network device */ | |
126 | #define CONFIG_DRIVER_NE2000 | |
127 | #define CONFIG_DRIVER_NE2000_BASE (0xb0000300) | |
128 | ||
129 | #endif /* __SHMIN_H */ |