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c0dcece7 HS |
1 | /* |
2 | * siemens am33x common board options | |
3 | * (C) Copyright 2013 Siemens Schweiz AG | |
4 | * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. | |
5 | * | |
6 | * Based on: | |
7 | * U-Boot file:/include/configs/am335x_evm.h | |
8 | * | |
9 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
10 | * | |
11 | * SPDX-License-Identifier: GPL-2.0+ | |
12 | */ | |
13 | ||
14 | #ifndef __CONFIG_SIEMENS_AM33X_COMMON_H | |
15 | #define __CONFIG_SIEMENS_AM33X_COMMON_H | |
16 | ||
17 | #define CONFIG_AM33XX | |
18 | #define CONFIG_OMAP | |
19 | #define CONFIG_OMAP_COMMON | |
20 | ||
21 | #include <asm/arch/omap.h> | |
22 | ||
23 | #define CONFIG_DMA_COHERENT | |
24 | #define CONFIG_DMA_COHERENT_SIZE (1 << 20) | |
25 | ||
26 | #define CONFIG_ENV_SIZE (0x2000) | |
27 | #define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) | |
28 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
29 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
30 | #define CONFIG_SYS_PROMPT "U-Boot# " | |
31 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
32 | #define CONFIG_BOARD_LATE_INIT | |
33 | #define CONFIG_SYS_NO_FLASH | |
34 | #define CONFIG_MACH_TYPE CONFIG_SIEMENS_MACH_TYPE | |
35 | ||
36 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
37 | #define CONFIG_SETUP_MEMORY_TAGS | |
38 | #define CONFIG_INITRD_TAG | |
39 | ||
40 | #define CONFIG_SYS_CACHELINE_SIZE 64 | |
41 | ||
42 | /* commands to include */ | |
43 | #include <config_cmd_default.h> | |
44 | ||
45 | #define CONFIG_CMD_ASKENV | |
46 | #define CONFIG_CMD_ECHO | |
47 | #define CONFIG_CMD_CACHE | |
48 | ||
d14c6335 HS |
49 | #define CONFIG_SYS_GENERIC_BOARD |
50 | ||
c0dcece7 HS |
51 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
52 | #ifndef CONFIG_SPL_BUILD | |
53 | #define CONFIG_ROOTPATH "/opt/eldk" | |
54 | #endif | |
55 | ||
56 | #define CONFIG_ENV_OVERWRITE 1 | |
57 | #define CONFIG_ENV_IS_NOWHERE | |
58 | ||
59 | #define CONFIG_SYS_LONGHELP | |
60 | #define CONFIG_CMDLINE_EDITING | |
61 | #define CONFIG_AUTO_COMPLETE | |
62 | #define CONFIG_SYS_AUTOLOAD "yes" | |
63 | ||
64 | /* Clock Defines */ | |
65 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
66 | #define V_SCLK (V_OSCK) | |
67 | ||
68 | /* We set the max number of command args high to avoid HUSH bugs. */ | |
69 | #define CONFIG_SYS_MAXARGS 32 | |
70 | ||
71 | /* Console I/O Buffer Size */ | |
72 | #define CONFIG_SYS_CBSIZE 512 | |
73 | ||
74 | /* Print Buffer Size */ | |
75 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
76 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
77 | ||
78 | /* Boot Argument Buffer Size */ | |
79 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
80 | ||
81 | /* | |
82 | * memtest works on 8 MB in DRAM after skipping 32MB from | |
83 | * start addr of ram disk | |
84 | */ | |
85 | #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) | |
86 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ | |
87 | + (8 * 1024 * 1024)) | |
88 | ||
89 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ | |
c0dcece7 HS |
90 | |
91 | #define CONFIG_MMC | |
92 | #define CONFIG_GENERIC_MMC | |
93 | #define CONFIG_OMAP_HSMMC | |
94 | #define CONFIG_CMD_MMC | |
95 | #define CONFIG_DOS_PARTITION | |
96 | #define CONFIG_CMD_FAT | |
97 | #define CONFIG_CMD_EXT2 | |
98 | ||
99 | #define CONFIG_SPI | |
100 | #define CONFIG_OMAP3_SPI | |
101 | #define CONFIG_MTD_DEVICE | |
102 | #define CONFIG_SPI_FLASH | |
103 | #define CONFIG_SPI_FLASH_WINBOND | |
104 | #define CONFIG_CMD_SF | |
105 | #define CONFIG_SF_DEFAULT_SPEED (75000000) | |
106 | ||
107 | /* Physical Memory Map */ | |
108 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
109 | #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ | |
110 | ||
111 | #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 | |
112 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ | |
113 | GENERATED_GBL_DATA_SIZE) | |
114 | /* Platform/Board specific defs */ | |
115 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ | |
116 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
c0dcece7 HS |
117 | |
118 | /* NS16550 Configuration */ | |
119 | #define CONFIG_SYS_NS16550 | |
120 | #define CONFIG_SYS_NS16550_SERIAL | |
121 | #define CONFIG_SERIAL_MULTI | |
122 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
123 | #define CONFIG_SYS_NS16550_CLK (48000000) | |
124 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 | |
125 | #define CONFIG_SYS_NS16550_COM4 0x481a6000 | |
126 | ||
127 | #define CONFIG_BAUDRATE 115200 | |
128 | ||
129 | #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
130 | #define CONFIG_SERIAL1 1 | |
131 | #define CONFIG_CONS_INDEX 1 | |
132 | ||
133 | /* I2C Configuration */ | |
134 | #define CONFIG_I2C | |
135 | #define CONFIG_CMD_I2C | |
6789e84e HS |
136 | #define CONFIG_SYS_I2C |
137 | #define CONFIG_SYS_OMAP24_I2C_SPEED OMAP_I2C_STANDARD | |
138 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
139 | #define CONFIG_SYS_I2C_OMAP24XX | |
c0dcece7 HS |
140 | |
141 | /* Defines for SPL */ | |
c0dcece7 HS |
142 | #define CONFIG_SPL_FRAMEWORK |
143 | #define CONFIG_SPL_TEXT_BASE 0x402F0400 | |
144 | #define CONFIG_SPL_MAX_SIZE (101 * 1024) | |
145 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR | |
146 | ||
147 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 | |
148 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
149 | ||
150 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
151 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
152 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
153 | #define CONFIG_SPL_MMC_SUPPORT | |
154 | #define CONFIG_SPL_FAT_SUPPORT | |
155 | #define CONFIG_FS_FAT | |
156 | #define CONFIG_SPL_I2C_SUPPORT | |
157 | ||
158 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
159 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
160 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
161 | #define CONFIG_SPL_SERIAL_SUPPORT | |
162 | #define CONFIG_SPL_YMODEM_SUPPORT | |
163 | ||
164 | #define CONFIG_SPL_GPIO_SUPPORT | |
165 | #define CONFIG_SPL_WATCHDOG_SUPPORT | |
166 | ||
167 | #define CONFIG_SPL_SPI_SUPPORT | |
168 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
169 | #define CONFIG_SPL_SPI_LOAD | |
170 | #define CONFIG_SPL_SPI_BUS 0 | |
171 | #define CONFIG_SPL_SPI_CS 0 | |
172 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 | |
173 | ||
174 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" | |
175 | ||
176 | #define CONFIG_SPL_BOARD_INIT | |
177 | #define CONFIG_SPL_NAND_AM33XX_BCH | |
178 | #define CONFIG_SPL_NAND_SUPPORT | |
179 | #define CONFIG_SPL_NAND_BASE | |
180 | #define CONFIG_SPL_NAND_DRIVERS | |
181 | #define CONFIG_SPL_NAND_ECC | |
182 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
183 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
184 | CONFIG_SYS_NAND_PAGE_SIZE) | |
185 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
186 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
187 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
188 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
189 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
190 | 10, 11, 12, 13, 14, 15, 16, 17, \ | |
191 | 18, 19, 20, 21, 22, 23, 24, 25, \ | |
192 | 26, 27, 28, 29, 30, 31, 32, 33, \ | |
193 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
194 | 42, 43, 44, 45, 46, 47, 48, 49, \ | |
195 | 50, 51, 52, 53, 54, 55, 56, 57, } | |
196 | ||
197 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
198 | #define CONFIG_SYS_NAND_ECCBYTES 14 | |
3f719069 | 199 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW |
c0dcece7 HS |
200 | |
201 | #define CONFIG_SYS_NAND_ECCSTEPS 4 | |
202 | #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ | |
203 | CONFIG_SYS_NAND_ECCSTEPS) | |
204 | ||
205 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
206 | ||
207 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
208 | ||
209 | /* | |
210 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
211 | * 64 bytes before this address should be set aside for u-boot.img's | |
212 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
213 | * other needs. | |
214 | */ | |
215 | #define CONFIG_SYS_TEXT_BASE 0x80100000 | |
216 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
217 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
218 | ||
219 | /* | |
220 | * Since SPL did pll and ddr initialization for us, | |
221 | * we don't need to do it twice. | |
222 | */ | |
223 | #ifndef CONFIG_SPL_BUILD | |
224 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
225 | #endif | |
226 | ||
227 | #ifndef CONFIG_SPL_BUILD | |
228 | /* | |
229 | * USB configuration | |
230 | */ | |
231 | #define CONFIG_USB_MUSB_DSPS | |
232 | #define CONFIG_ARCH_MISC_INIT | |
233 | #define CONFIG_MUSB_GADGET | |
234 | #define CONFIG_MUSB_PIO_ONLY | |
235 | #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT | |
236 | #define CONFIG_USB_GADGET_DUALSPEED | |
237 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 | |
238 | #define CONFIG_MUSB_HOST | |
239 | ||
240 | #define CONFIG_AM335X_USB0 | |
241 | #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL | |
242 | #define CONFIG_AM335X_USB1 | |
243 | #define CONFIG_AM335X_USB1_MODE MUSB_HOST | |
244 | #ifdef CONFIG_MUSB_HOST | |
245 | #define CONFIG_CMD_USB | |
246 | #define CONFIG_USB_STORAGE | |
247 | #endif | |
248 | ||
249 | #ifdef CONFIG_MUSB_GADGET | |
250 | #define CONFIG_USB_ETHER | |
251 | #define CONFIG_USB_ETH_RNDIS | |
252 | #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" | |
253 | #endif /* CONFIG_MUSB_GADGET */ | |
254 | ||
255 | #define CONFIG_USB_GADGET | |
256 | #define CONFIG_USBDOWNLOAD_GADGET | |
257 | ||
56eb3da4 | 258 | /* USB DRACO ID as default */ |
c0dcece7 | 259 | #define CONFIG_USBD_HS |
56eb3da4 SE |
260 | #define CONFIG_G_DNL_VENDOR_NUM 0x0908 |
261 | #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2 | |
262 | #define CONFIG_G_DNL_MANUFACTURER "Siemens AG" | |
c0dcece7 HS |
263 | |
264 | /* USB Device Firmware Update support */ | |
265 | #define CONFIG_DFU_FUNCTION | |
266 | #define CONFIG_DFU_NAND | |
267 | #define CONFIG_CMD_DFU | |
268 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20) | |
401341d6 | 269 | #define DFU_MANIFEST_POLL_TIMEOUT 25000 |
c0dcece7 HS |
270 | |
271 | #endif /* CONFIG_SPL_BUILD */ | |
272 | ||
273 | /* | |
274 | * Default to using SPI for environment, etc. We have multiple copies | |
275 | * of SPL as the ROM will check these locations. | |
276 | * 0x0 - 0x20000 : First copy of SPL | |
277 | * 0x20000 - 0x40000 : Second copy of SPL | |
278 | * 0x40000 - 0x60000 : Third copy of SPL | |
279 | * 0x60000 - 0x80000 : Fourth copy of SPL | |
280 | * 0x80000 - 0xDF000 : U-Boot | |
281 | * 0xDF000 - 0xE0000 : U-Boot Environment | |
282 | * 0xE0000 - 0x442000 : Linux Kernel | |
283 | * 0x442000 - 0x800000 : Userland | |
284 | */ | |
285 | #if defined(CONFIG_SPI_BOOT) | |
286 | # undef CONFIG_ENV_IS_NOWHERE | |
287 | # define CONFIG_ENV_IS_IN_SPI_FLASH | |
288 | # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
289 | # define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ | |
290 | # define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ | |
291 | #endif /* SPI support */ | |
292 | ||
293 | /* Unsupported features */ | |
294 | #undef CONFIG_USE_IRQ | |
295 | ||
296 | #define CONFIG_CMD_NET | |
297 | #define CONFIG_CMD_DHCP | |
298 | #define CONFIG_CMD_PING | |
299 | #define CONFIG_DRIVER_TI_CPSW | |
300 | #define CONFIG_MII | |
301 | #define CONFIG_PHY_GIGE | |
302 | #define CONFIG_PHYLIB | |
303 | #define CONFIG_CMD_MII | |
304 | #define CONFIG_BOOTP_DEFAULT | |
305 | #define CONFIG_BOOTP_DNS | |
306 | #define CONFIG_BOOTP_DNS2 | |
307 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
308 | #define CONFIG_BOOTP_GATEWAY | |
309 | #define CONFIG_BOOTP_SUBNETMASK | |
310 | #define CONFIG_NET_RETRY_COUNT 10 | |
311 | #define CONFIG_NET_MULTI | |
312 | ||
313 | #define CONFIG_NAND | |
314 | /* NAND support */ | |
315 | #ifdef CONFIG_NAND | |
316 | #define CONFIG_CMD_NAND | |
317 | #define CONFIG_CMD_MTDPARTS | |
318 | ||
319 | #define MTDIDS_NAME_STR "omap2-nand.0" | |
320 | #define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR | |
321 | #define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \ | |
322 | "128k(spl)," \ | |
323 | "128k(spl.backup1)," \ | |
324 | "128k(spl.backup2)," \ | |
325 | "128k(spl.backup3)," \ | |
326 | "1920k(u-boot)," \ | |
327 | "128k(uboot.env)," \ | |
328 | "5120k(kernel_a)," \ | |
329 | "5120k(kernel_b)," \ | |
330 | "8192k(mtdoops)," \ | |
331 | "-(rootfs)" | |
332 | /* | |
333 | * chip-size = 256MiB | |
334 | *| name | size | address area | | |
335 | *------------------------------------------------------- | |
336 | *| spl | 128.000 KiB | 0x 0..0x 1ffff | | |
337 | *| spl.backup1 | 128.000 KiB | 0x 20000..0x 3ffff | | |
338 | *| spl.backup2 | 128.000 KiB | 0x 40000..0x 5ffff | | |
339 | *| spl.backup3 | 128.000 KiB | 0x 60000..0x 7ffff | | |
340 | *| u-boot | 1.875 MiB | 0x 80000..0x 25ffff | | |
341 | *| uboot.env | 128.000 KiB | 0x 260000..0x 27ffff | | |
342 | *| kernel_a | 5.000 MiB | 0x 280000..0x 77ffff | | |
343 | *| kernel_b | 5.000 MiB | 0x 780000..0x c7ffff | | |
344 | *| mtdoops | 8.000 MiB | 0x c80000..0x 147ffff | | |
345 | *| rootfs | 235.500 MiB | 0x 1480000..0x fffffff | | |
346 | *------------------------------------------------------- | |
347 | */ | |
348 | ||
349 | #define DFU_ALT_INFO_NAND \ | |
350 | "spl part 0 1;" \ | |
351 | "spl.backup1 part 0 2;" \ | |
352 | "spl.backup2 part 0 3;" \ | |
353 | "spl.backup3 part 0 4;" \ | |
354 | "u-boot part 0 5;" \ | |
355 | "u-boot.env part 0 6;" \ | |
356 | "kernel_a part 0 7;" \ | |
357 | "kernel_b part 0 8;" \ | |
358 | "rootfs partubi 0 10" | |
359 | ||
360 | #define CONFIG_COMMON_ENV_SETTINGS \ | |
361 | "verify=no \0" \ | |
66c45fae | 362 | "project_dir=targetdir\0" \ |
56eb3da4 SE |
363 | "upgrade_available=0\0" \ |
364 | "altbootcmd=run bootcmd\0" \ | |
365 | "bootlimit=3\0" \ | |
366 | "partitionset_active=A\0" \ | |
c0dcece7 HS |
367 | "loadaddr=0x82000000\0" \ |
368 | "kloadaddr=0x81000000\0" \ | |
369 | "script_addr=0x81900000\0" \ | |
56eb3da4 | 370 | "console=console=ttyMTD,mtdoops console=ttyO0,115200n8 panic=5\0" \ |
c0dcece7 | 371 | "nand_active_ubi_vol=rootfs_a\0" \ |
56eb3da4 SE |
372 | "nand_active_ubi_vol_A=rootfs_a\0" \ |
373 | "nand_active_ubi_vol_B=rootfs_b\0" \ | |
c0dcece7 HS |
374 | "nand_root_fs_type=ubifs rootwait=1\0" \ |
375 | "nand_src_addr=0x280000\0" \ | |
56eb3da4 SE |
376 | "nand_src_addr_A=0x280000\0" \ |
377 | "nand_src_addr_B=0x780000\0" \ | |
c0dcece7 HS |
378 | "nfsopts=nolock rw mem=128M\0" \ |
379 | "ip_method=none\0" \ | |
380 | "bootenv=uEnv.txt\0" \ | |
381 | "bootargs_defaults=setenv bootargs " \ | |
382 | "console=${console} " \ | |
56eb3da4 | 383 | "${testargs} " \ |
c0dcece7 HS |
384 | "${optargs}\0" \ |
385 | "nand_args=run bootargs_defaults;" \ | |
386 | "mtdparts default;" \ | |
56eb3da4 SE |
387 | "setenv ${partitionset_active} true;" \ |
388 | "if test -n ${A}; then " \ | |
389 | "setenv nand_active_ubi_vol ${nand_active_ubi_vol_A};" \ | |
390 | "setenv nand_src_addr ${nand_src_addr_A};" \ | |
c0dcece7 | 391 | "fi;" \ |
56eb3da4 SE |
392 | "if test -n ${B}; then " \ |
393 | "setenv nand_active_ubi_vol ${nand_active_ubi_vol_B};" \ | |
394 | "setenv nand_src_addr ${nand_src_addr_B};" \ | |
c0dcece7 HS |
395 | "fi;" \ |
396 | "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \ | |
397 | "ubi.mtd=9,2048;" \ | |
398 | "setenv bootargs ${bootargs} " \ | |
399 | "root=${nand_root} noinitrd ${mtdparts} " \ | |
400 | "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ | |
401 | "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ | |
402 | "=mtdoops\0" \ | |
403 | "dfu_args=run bootargs_defaults;" \ | |
404 | "setenv bootargs ${bootargs} ;" \ | |
405 | "mtdparts default; " \ | |
84112b51 ES |
406 | "led dfu 1;" \ |
407 | "led stat 0;" \ | |
408 | "dfu 0 nand 0;" \ | |
409 | "led dfu 0;" \ | |
410 | "led stat 1;\0" \ | |
c0dcece7 HS |
411 | "dfu_alt_info=" DFU_ALT_INFO_NAND "\0" \ |
412 | "net_args=run bootargs_defaults;" \ | |
413 | "mtdparts default;" \ | |
414 | "setenv bootfile ${project_dir}/kernel/uImage;" \ | |
415 | "setenv rootpath /home/projects/${project_dir}/rootfs;" \ | |
416 | "setenv bootargs ${bootargs} " \ | |
417 | "root=/dev/nfs ${mtdparts} " \ | |
418 | "nfsroot=${serverip}:${rootpath},${nfsopts} " \ | |
56eb3da4 | 419 | "ip=${ipaddr}:${serverip}:" \ |
c0dcece7 | 420 | "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \ |
56eb3da4 SE |
421 | "nand_boot=echo Booting from nand; " \ |
422 | "if test ${upgrade_available} -eq 1; then " \ | |
423 | "if test ${bootcount} -gt ${bootlimit}; " \ | |
424 | "then " \ | |
425 | "setenv upgrade_available 0;" \ | |
426 | "setenv ${partitionset_active} true;" \ | |
427 | "if test -n ${A}; then " \ | |
428 | "setenv partitionset_active B; " \ | |
429 | "env delete A; " \ | |
430 | "fi;" \ | |
431 | "if test -n ${B}; then " \ | |
432 | "setenv partitionset_active A; " \ | |
433 | "env delete B; " \ | |
434 | "fi;" \ | |
435 | "saveenv; " \ | |
436 | "fi;" \ | |
437 | "fi;" \ | |
438 | "echo set ${partitionset_active}...;" \ | |
c0dcece7 HS |
439 | "run nand_args; " \ |
440 | "nand read.i ${kloadaddr} ${nand_src_addr} " \ | |
441 | "${nand_img_size}; bootm ${kloadaddr}\0" \ | |
442 | "net_nfs=echo Booting from network ...; " \ | |
443 | "run net_args; " \ | |
444 | "tftpboot ${kloadaddr} ${serverip}:${bootfile}; " \ | |
445 | "bootm ${kloadaddr}\0" \ | |
446 | "flash_self=run nand_boot\0" \ | |
56eb3da4 | 447 | "flash_self_test=setenv testargs test; " \ |
c0dcece7 HS |
448 | "run nand_boot\0" \ |
449 | "dfu_start=echo Preparing for dfu mode ...; " \ | |
450 | "run dfu_args; \0" \ | |
451 | "preboot=echo; "\ | |
452 | "echo Type 'run flash_self' to use kernel and root " \ | |
453 | "filesystem on memory; echo Type 'run flash_self_test' to " \ | |
454 | "use kernel and root filesystem on memory, boot in test " \ | |
455 | "mode; echo Not ready yet: 'run flash_nfs' to use kernel " \ | |
456 | "from memory and root filesystem over NFS; echo Type " \ | |
457 | "'run net_nfs' to get Kernel over TFTP and mount root " \ | |
56eb3da4 SE |
458 | "filesystem over NFS; " \ |
459 | "echo Set partitionset_active variable to 'A' " \ | |
460 | "or 'B' to select kernel and rootfs partition; " \ | |
c0dcece7 HS |
461 | "echo" \ |
462 | "\0" | |
463 | ||
464 | #define CONFIG_NAND_OMAP_GPMC | |
beba5f04 | 465 | #define CONFIG_NAND_OMAP_ELM |
c0dcece7 HS |
466 | #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ |
467 | /* to access nand at */ | |
468 | /* CS0 */ | |
469 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND | |
470 | devices */ | |
471 | #if !defined(CONFIG_SPI_BOOT) | |
472 | #undef CONFIG_ENV_IS_NOWHERE | |
473 | #define CONFIG_ENV_IS_IN_NAND | |
474 | #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ | |
475 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ | |
476 | #endif | |
477 | #endif | |
478 | ||
c0dcece7 | 479 | #define CONFIG_OMAP_GPIO |
c0dcece7 HS |
480 | |
481 | /* Watchdog */ | |
482 | #define CONFIG_HW_WATCHDOG | |
483 | ||
484 | /* Stop autoboot with ESC ESC key detected */ | |
485 | #define CONFIG_AUTOBOOT_KEYED | |
486 | #define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b" | |
487 | #define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ | |
488 | "press \"<Esc><Esc>\" to stop\n", bootdelay | |
489 | ||
56eb3da4 SE |
490 | /* Reboot after 60 sec if bootcmd fails */ |
491 | #define CONFIG_RESET_TO_RETRY | |
492 | #define CONFIG_BOOT_RETRY_TIME 60 | |
493 | ||
494 | #define CONFIG_BOOTCOUNT_LIMIT | |
495 | #define CONFIG_BOOTCOUNT_ENV | |
9167fc81 SR |
496 | |
497 | /* Enable Device-Tree (FDT) support */ | |
498 | #define CONFIG_OF_LIBFDT | |
499 | #define CONFIG_CMD_FDT | |
500 | ||
c0dcece7 | 501 | #endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */ |