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3b5df50e HS |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
3 | * Stelian Pop <stelian@popies.net> | |
4 | * Lead Tech Design <www.leadtechdesign.com> | |
5 | * | |
6 | * (C) Copyright 2010 | |
7 | * Achim Ehrlich <aehrlich@taskit.de> | |
8 | * taskit GmbH <www.taskit.de> | |
9 | * | |
10 | * (C) Copyright 2012 | |
11 | * Markus Hubig <mhubig@imko.de> | |
12 | * IMKO GmbH <www.imko.de> | |
13 | * | |
14 | * (C) Copyright 2014 | |
15 | * Heiko Schocher <hs@denx.de> | |
16 | * DENX Software Engineering GmbH | |
17 | * | |
18 | * Configuation settings for the smartweb. | |
19 | * | |
20 | * SPDX-License-Identifier: GPL-2.0+ | |
21 | */ | |
22 | ||
23 | #ifndef __CONFIG_H | |
24 | #define __CONFIG_H | |
25 | ||
26 | /* | |
27 | * SoC must be defined first, before hardware.h is included. | |
28 | * In this case SoC is defined in boards.cfg. | |
29 | */ | |
30 | #include <asm/hardware.h> | |
e8b81eef | 31 | #include <linux/sizes.h> |
3b5df50e HS |
32 | |
33 | /* | |
34 | * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot | |
35 | * program. Since the linker has to swallow that define, we must use a pure | |
36 | * hex number here! | |
37 | */ | |
38 | #define CONFIG_SYS_TEXT_BASE 0x23000000 | |
39 | ||
40 | /* ARM asynchronous clock */ | |
41 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ | |
42 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ | |
43 | ||
44 | /* misc settings */ | |
45 | #define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */ | |
46 | #define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */ | |
47 | #define CONFIG_INITRD_TAG /* pass initrd param to kernel */ | |
13ee7890 | 48 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */ |
3b5df50e | 49 | #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ |
3b5df50e | 50 | |
b96fd825 MM |
51 | /* We set the max number of command args high to avoid HUSH bugs. */ |
52 | #define CONFIG_SYS_MAXARGS 32 | |
53 | ||
3b5df50e | 54 | /* setting board specific options */ |
b96fd825 MM |
55 | #define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB |
56 | #define CONFIG_AUTO_COMPLETE | |
57 | #define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */ | |
3b5df50e | 58 | #define CONFIG_AUTO_COMPLETE |
b96fd825 MM |
59 | #define CONFIG_SYS_AUTOLOAD "yes" |
60 | #define CONFIG_RESET_TO_RETRY | |
3b5df50e HS |
61 | |
62 | /* The LED PINs */ | |
63 | #define CONFIG_RED_LED AT91_PIN_PA9 | |
64 | #define CONFIG_GREEN_LED AT91_PIN_PA6 | |
65 | ||
66 | /* | |
67 | * SDRAM: 1 bank, 64 MB, base address 0x20000000 | |
68 | * Already initialized before u-boot gets started. | |
69 | */ | |
70 | #define CONFIG_NR_DRAM_BANKS 1 | |
71 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 | |
e8b81eef | 72 | #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) |
3b5df50e HS |
73 | |
74 | /* | |
75 | * Perform a SDRAM Memtest from the start of SDRAM | |
76 | * till the beginning of the U-Boot position in RAM. | |
77 | */ | |
78 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
79 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) | |
80 | ||
81 | /* Size of malloc() pool */ | |
82 | #define CONFIG_SYS_MALLOC_LEN \ | |
e8b81eef | 83 | ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000) |
3b5df50e HS |
84 | |
85 | /* NAND flash settings */ | |
86 | #define CONFIG_NAND_ATMEL | |
87 | #define CONFIG_SYS_NO_FLASH | |
88 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
89 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
90 | #define CONFIG_SYS_NAND_DBW_8 | |
91 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
92 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
93 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
94 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
95 | ||
96 | #define CONFIG_CMD_MTDPARTS | |
97 | #define CONFIG_MTD_DEVICE | |
98 | #define MTDIDS_NAME_STR "atmel_nand" | |
99 | #define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR | |
100 | #define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \ | |
101 | "128k(Bootstrap)," \ | |
102 | "896k(U-Boot)," \ | |
103 | "512k(ENV0)," \ | |
104 | "512k(ENV1)," \ | |
105 | "4M(Linux)," \ | |
106 | "-(Root-FS)" | |
107 | ||
108 | /* general purpose I/O */ | |
109 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
110 | #define CONFIG_AT91_GPIO /* enable the GPIO features */ | |
111 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
112 | ||
113 | /* serial console */ | |
114 | #define CONFIG_ATMEL_USART | |
115 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
116 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
117 | #define CONFIG_BAUDRATE 115200 | |
118 | ||
119 | /* | |
120 | * Ethernet configuration | |
121 | * | |
122 | */ | |
123 | #define CONFIG_MACB | |
a212b66d | 124 | #define CONFIG_PHYLIB |
aca5d083 HS |
125 | #define CONFIG_USB_HOST_ETHER |
126 | #define CONFIG_USB_ETHER_ASIX | |
127 | #define CONFIG_USB_ETHER_MCS7830 | |
3b5df50e HS |
128 | #define CONFIG_RMII /* use reduced MII inteface */ |
129 | #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ | |
130 | #define CONFIG_AT91_WANTS_COMMON_PHY | |
131 | ||
132 | /* BOOTP and DHCP options */ | |
133 | #define CONFIG_BOOTP_BOOTFILESIZE | |
134 | #define CONFIG_BOOTP_BOOTPATH | |
135 | #define CONFIG_BOOTP_GATEWAY | |
136 | #define CONFIG_BOOTP_HOSTNAME | |
137 | #define CONFIG_NFSBOOTCOMMAND \ | |
138 | "setenv autoload yes; setenv autoboot yes; " \ | |
139 | "setenv bootargs ${basicargs} ${mtdparts} " \ | |
140 | "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \ | |
141 | "dhcp" | |
142 | ||
143 | /* Enable the watchdog */ | |
144 | #define CONFIG_AT91SAM9_WATCHDOG | |
145 | #if !defined(CONFIG_SPL_BUILD) | |
146 | #define CONFIG_HW_WATCHDOG | |
147 | #endif | |
148 | #define CONFIG_AT91_HW_WDT_TIMEOUT 15 | |
149 | ||
150 | #if !defined(CONFIG_SPL_BUILD) | |
151 | /* USB configuration */ | |
152 | #define CONFIG_USB_ATMEL | |
153 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB | |
154 | #define CONFIG_USB_OHCI_NEW | |
3b5df50e HS |
155 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
156 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE | |
157 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
158 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
e8b81eef | 159 | |
e8b81eef HS |
160 | /* USB DFU support */ |
161 | #define CONFIG_CMD_MTDPARTS | |
162 | #define CONFIG_MTD_DEVICE | |
163 | #define CONFIG_MTD_PARTITIONS | |
164 | ||
e8b81eef HS |
165 | #define CONFIG_USB_GADGET_AT91 |
166 | ||
167 | /* DFU class support */ | |
e8b81eef HS |
168 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M |
169 | #define DFU_MANIFEST_POLL_TIMEOUT 25000 | |
3b5df50e HS |
170 | #endif |
171 | ||
172 | /* General Boot Parameter */ | |
3b5df50e | 173 | #define CONFIG_BOOTCOMMAND "run flashboot" |
3b5df50e | 174 | #define CONFIG_SYS_CBSIZE 512 |
3b5df50e HS |
175 | #define CONFIG_SYS_PBSIZE \ |
176 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
177 | #define CONFIG_SYS_LONGHELP | |
178 | #define CONFIG_CMDLINE_EDITING | |
179 | ||
180 | /* | |
181 | * RAM Memory address where to put the | |
182 | * Linux Kernel befor starting. | |
183 | */ | |
184 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 | |
185 | ||
186 | /* | |
187 | * The NAND Flash partitions: | |
188 | */ | |
189 | #define CONFIG_ENV_IS_IN_NAND | |
190 | #define CONFIG_ENV_OFFSET (0x100000) | |
191 | #define CONFIG_ENV_OFFSET_REDUND (0x180000) | |
e8b81eef HS |
192 | #define CONFIG_ENV_RANGE (SZ_512K) |
193 | #define CONFIG_ENV_SIZE (SZ_128K) | |
3b5df50e HS |
194 | |
195 | /* | |
196 | * Predefined environment variables. | |
197 | * Usefull to define some easy to use boot commands. | |
198 | */ | |
199 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
200 | \ | |
201 | "basicargs=console=ttyS0,115200\0" \ | |
202 | \ | |
203 | "mtdparts="MTDPARTS_DEFAULT"\0" | |
204 | ||
205 | /* Command line & features configuration */ | |
3b5df50e HS |
206 | |
207 | #define CONFIG_CMD_NAND | |
3b5df50e HS |
208 | |
209 | #ifdef CONFIG_MACB | |
3b5df50e | 210 | #else |
3b5df50e HS |
211 | #endif /* CONFIG_MACB */ |
212 | ||
3b5df50e HS |
213 | #ifdef CONFIG_SPL_BUILD |
214 | #define CONFIG_SYS_INIT_SP_ADDR 0x301000 | |
215 | #define CONFIG_SPL_STACK_R | |
216 | #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE | |
217 | #else | |
218 | /* | |
219 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, | |
220 | * leaving the correct space for initial global data structure above that | |
221 | * address while providing maximum stack area below. | |
222 | */ | |
223 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
224 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
225 | #endif | |
226 | ||
3b5df50e HS |
227 | /* Defines for SPL */ |
228 | #define CONFIG_SPL_FRAMEWORK | |
229 | #define CONFIG_SPL_TEXT_BASE 0x0 | |
e8b81eef | 230 | #define CONFIG_SPL_MAX_SIZE (SZ_4K) |
3b5df50e HS |
231 | |
232 | #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE | |
e8b81eef | 233 | #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K) |
3b5df50e HS |
234 | #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ |
235 | CONFIG_SPL_BSS_MAX_SIZE) | |
236 | #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN | |
237 | #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | |
238 | ||
3b5df50e | 239 | #define CONFIG_SPL_BOARD_INIT |
3b5df50e | 240 | #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) |
3b5df50e HS |
241 | #define CONFIG_SYS_USE_NANDFLASH 1 |
242 | #define CONFIG_SPL_NAND_DRIVERS | |
243 | #define CONFIG_SPL_NAND_BASE | |
244 | #define CONFIG_SPL_NAND_ECC | |
245 | #define CONFIG_SPL_NAND_RAW_ONLY | |
246 | #define CONFIG_SPL_NAND_SOFTECC | |
247 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 | |
e8b81eef | 248 | #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K |
3b5df50e HS |
249 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
250 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE | |
251 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
252 | ||
e8b81eef HS |
253 | #define CONFIG_SYS_NAND_SIZE (SZ_256M) |
254 | #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K | |
255 | #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) | |
3b5df50e HS |
256 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ |
257 | CONFIG_SYS_NAND_PAGE_SIZE) | |
258 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
259 | #define CONFIG_SYS_NAND_ECCSIZE 256 | |
260 | #define CONFIG_SYS_NAND_ECCBYTES 3 | |
261 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
262 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ | |
263 | 48, 49, 50, 51, 52, 53, 54, 55, \ | |
264 | 56, 57, 58, 59, 60, 61, 62, 63, } | |
265 | ||
266 | #define CONFIG_SPL_ATMEL_SIZE | |
267 | #define CONFIG_SYS_MASTER_CLOCK (198656000/2) | |
268 | #define AT91_PLL_LOCK_TIMEOUT 1000000 | |
269 | #define CONFIG_SYS_AT91_PLLA 0x2060bf09 | |
270 | #define CONFIG_SYS_MCKR 0x100 | |
271 | #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) | |
272 | #define CONFIG_SYS_AT91_PLLB 0x10483f0e | |
273 | ||
274 | #if defined(CONFIG_SPL_BUILD) | |
275 | #define CONFIG_SYS_THUMB_BUILD | |
276 | #define CONFIG_SYS_ICACHE_OFF | |
277 | #define CONFIG_SYS_DCACHE_OFF | |
278 | #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ | |
279 | #endif | |
280 | #endif /* __CONFIG_H */ |