]>
Commit | Line | Data |
---|---|---|
81a8824f WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
4 | * Marius Groeger <mgroeger@sysgo.de> | |
792a09eb | 5 | * Gary Jennejohn <garyj@denx.de> |
81a8824f WD |
6 | * David Mueller <d.mueller@elsoft.ch> |
7 | * | |
8 | * Configuation settings for the SAMSUNG SMDK2410 board. | |
9 | * | |
10 | * See file CREDITS for list of people who contributed to this | |
11 | * project. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License as | |
15 | * published by the Free Software Foundation; either version 2 of | |
16 | * the License, or (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
26 | * MA 02111-1307 USA | |
27 | */ | |
28 | ||
29 | #ifndef __CONFIG_H | |
30 | #define __CONFIG_H | |
31 | ||
81a8824f WD |
32 | /* |
33 | * High Level Configuration Options | |
34 | * (easy to change) | |
35 | */ | |
d0b375f6 DMEA |
36 | #define CONFIG_ARM920T /* This is an ARM920T Core */ |
37 | #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */ | |
38 | #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */ | |
39 | #define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */ | |
81a8824f | 40 | |
4479fc5b DMEA |
41 | #define CONFIG_SYS_TEXT_BASE 0x0 |
42 | ||
d0b375f6 | 43 | #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH |
81a8824f | 44 | |
d0b375f6 DMEA |
45 | /* input clock of PLL (the SMDK2410 has 12MHz input clock) */ |
46 | #define CONFIG_SYS_CLK_FREQ 12000000 | |
81a8824f | 47 | |
d0b375f6 DMEA |
48 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
49 | #define CONFIG_SETUP_MEMORY_TAGS | |
50 | #define CONFIG_INITRD_TAG | |
81a8824f WD |
51 | |
52 | /* | |
53 | * Hardware drivers | |
54 | */ | |
b1c0eaac BW |
55 | #define CONFIG_CS8900 /* we have a CS8900 on-board */ |
56 | #define CONFIG_CS8900_BASE 0x19000300 | |
57 | #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ | |
81a8824f WD |
58 | |
59 | /* | |
60 | * select serial console configuration | |
61 | */ | |
300f99f4 | 62 | #define CONFIG_S3C24X0_SERIAL |
d0b375f6 DMEA |
63 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */ |
64 | ||
65 | /************************************************************ | |
66 | * USB support (currently only works with D-cache off) | |
67 | ************************************************************/ | |
68 | #define CONFIG_USB_OHCI | |
fb24ffc0 | 69 | #define CONFIG_USB_OHCI_S3C24XX |
d0b375f6 DMEA |
70 | #define CONFIG_USB_KEYBOARD |
71 | #define CONFIG_USB_STORAGE | |
72 | #define CONFIG_DOS_PARTITION | |
81a8824f | 73 | |
48b42616 WD |
74 | /************************************************************ |
75 | * RTC | |
76 | ************************************************************/ | |
d0b375f6 | 77 | #define CONFIG_RTC_S3C24X0 |
48b42616 | 78 | |
81a8824f WD |
79 | |
80 | #define CONFIG_BAUDRATE 115200 | |
81 | ||
079a136c JL |
82 | /* |
83 | * BOOTP options | |
84 | */ | |
85 | #define CONFIG_BOOTP_BOOTFILESIZE | |
86 | #define CONFIG_BOOTP_BOOTPATH | |
87 | #define CONFIG_BOOTP_GATEWAY | |
88 | #define CONFIG_BOOTP_HOSTNAME | |
89 | ||
46da1e96 JL |
90 | /* |
91 | * Command line configuration. | |
92 | */ | |
93 | #include <config_cmd_default.h> | |
94 | ||
d0b375f6 | 95 | #define CONFIG_CMD_BSP |
46da1e96 | 96 | #define CONFIG_CMD_CACHE |
46da1e96 | 97 | #define CONFIG_CMD_DATE |
d0b375f6 | 98 | #define CONFIG_CMD_DHCP |
46da1e96 | 99 | #define CONFIG_CMD_ELF |
d0b375f6 DMEA |
100 | #define CONFIG_CMD_NAND |
101 | #define CONFIG_CMD_PING | |
102 | #define CONFIG_CMD_REGINFO | |
103 | #define CONFIG_CMD_USB | |
104 | ||
105 | #define CONFIG_SYS_HUSH_PARSER | |
d0b375f6 DMEA |
106 | #define CONFIG_CMDLINE_EDITING |
107 | ||
108 | /* autoboot */ | |
109 | #define CONFIG_BOOTDELAY 5 | |
110 | #define CONFIG_BOOT_RETRY_TIME -1 | |
111 | #define CONFIG_RESET_TO_RETRY | |
112 | #define CONFIG_ZERO_BOOTDELAY_CHECK | |
113 | ||
114 | #define CONFIG_NETMASK 255.255.255.0 | |
81a8824f WD |
115 | #define CONFIG_IPADDR 10.0.0.110 |
116 | #define CONFIG_SERVERIP 10.0.0.1 | |
81a8824f | 117 | |
46da1e96 | 118 | #if defined(CONFIG_CMD_KGDB) |
d0b375f6 | 119 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
81a8824f | 120 | /* what's this ? it's not used anywhere */ |
d0b375f6 | 121 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
81a8824f WD |
122 | #endif |
123 | ||
124 | /* | |
125 | * Miscellaneous configurable options | |
126 | */ | |
d0b375f6 DMEA |
127 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
128 | #define CONFIG_SYS_PROMPT "SMDK2410 # " | |
129 | #define CONFIG_SYS_CBSIZE 256 | |
130 | /* Print Buffer Size */ | |
131 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
132 | sizeof(CONFIG_SYS_PROMPT)+16) | |
133 | #define CONFIG_SYS_MAXARGS 16 | |
134 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
135 | ||
3d3206f1 | 136 | #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ |
81a8824f | 137 | |
d0b375f6 DMEA |
138 | #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ |
139 | #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ | |
81a8824f | 140 | |
d0b375f6 | 141 | #define CONFIG_SYS_LOAD_ADDR 0x30800000 |
81a8824f | 142 | |
d0b375f6 | 143 | #define CONFIG_SYS_HZ 1000 |
81a8824f | 144 | |
d0b375f6 DMEA |
145 | /* support additional compression methods */ |
146 | #define CONFIG_BZIP2 | |
147 | #define CONFIG_LZO | |
148 | #define CONFIG_LZMA | |
149 | ||
81a8824f WD |
150 | /*----------------------------------------------------------------------- |
151 | * Physical Memory Map | |
152 | */ | |
d0b375f6 | 153 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
81a8824f WD |
154 | #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ |
155 | #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ | |
156 | ||
d0b375f6 | 157 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */ |
81a8824f | 158 | |
a5ec7f64 | 159 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
81a8824f WD |
160 | |
161 | /*----------------------------------------------------------------------- | |
162 | * FLASH and environment organization | |
163 | */ | |
164 | ||
a5ec7f64 DMEA |
165 | #define CONFIG_SYS_FLASH_CFI |
166 | #define CONFIG_FLASH_CFI_DRIVER | |
167 | #define CONFIG_FLASH_CFI_LEGACY | |
168 | #define CONFIG_SYS_FLASH_LEGACY_512Kx16 | |
169 | #define CONFIG_FLASH_SHOW_PROGRESS 45 | |
81a8824f | 170 | |
a5ec7f64 | 171 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
d0b375f6 | 172 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } |
a5ec7f64 | 173 | #define CONFIG_SYS_MAX_FLASH_SECT (19) |
81a8824f | 174 | |
d0b375f6 DMEA |
175 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) |
176 | #define CONFIG_ENV_IS_IN_FLASH | |
177 | #define CONFIG_ENV_SIZE 0x10000 | |
178 | /* allow to overwrite serial and ethaddr */ | |
179 | #define CONFIG_ENV_OVERWRITE | |
180 | ||
181 | /* | |
182 | * Size of malloc() pool | |
183 | * BZIP2 / LZO / LZMA need a lot of RAM | |
184 | */ | |
185 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) | |
81a8824f | 186 | |
a5ec7f64 DMEA |
187 | #define CONFIG_SYS_MONITOR_LEN (448 * 1024) |
188 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
189 | ||
d0b375f6 DMEA |
190 | /* |
191 | * NAND configuration | |
192 | */ | |
193 | #ifdef CONFIG_CMD_NAND | |
194 | #define CONFIG_NAND_S3C2410 | |
195 | #define CONFIG_SYS_S3C2410_NAND_HWECC | |
196 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
d0b375f6 DMEA |
197 | #define CONFIG_SYS_NAND_BASE 0x4E000000 |
198 | #endif | |
199 | ||
200 | /* | |
201 | * File system | |
202 | */ | |
203 | #define CONFIG_CMD_FAT | |
204 | #define CONFIG_CMD_EXT2 | |
205 | #define CONFIG_CMD_UBI | |
206 | #define CONFIG_CMD_UBIFS | |
207 | #define CONFIG_CMD_MTDPARTS | |
208 | #define CONFIG_MTD_DEVICE | |
209 | #define CONFIG_MTD_PARTITIONS | |
210 | #define CONFIG_YAFFS2 | |
211 | #define CONFIG_RBTREE | |
212 | ||
b9f15902 DMEA |
213 | /* additions for new relocation code, must be added to all boards */ |
214 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
215 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ | |
216 | GENERATED_GBL_DATA_SIZE) | |
217 | ||
d0b375f6 | 218 | #define CONFIG_BOARD_EARLY_INIT_F |
b9f15902 | 219 | |
d0b375f6 | 220 | #endif /* __CONFIG_H */ |