[people/ms/u-boot.git] / include / configs / smdk2410.h

/*
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 * Gary Jennejohn <garyj@denx.de>
 * David Mueller <d.mueller@elsoft.ch>
 *
 * Configuation settings for the SAMSUNG SMDK2410 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM920T	1	/* This is an ARM920T Core	*/
#define CONFIG_S3C24X0	1	/* in a SAMSUNG S3C24x0-type SoC	*/
#define CONFIG_S3C2410	1	/* specifically a SAMSUNG S3C2410 SoC	*/
#define CONFIG_SMDK2410	1	/* on a SAMSUNG SMDK2410 Board  */

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000/* the SMDK2410 has 12MHz input clock */


#define USE_920T_MMU		1
#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
#define CONFIG_NET_MULTI
#define CONFIG_CS8900		/* we have a CS8900 on-board */
#define CONFIG_CS8900_BASE	0x19000300
#define CONFIG_CS8900_BUS16	/* the Linux driver does accesses as shorts */

/*
 * select serial console configuration
 */
#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on SMDK2410 */

/************************************************************
 * RTC
 ************************************************************/
#define	CONFIG_RTC_S3C24X0	1

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		115200


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_ELF


#define CONFIG_BOOTDELAY	3
/*#define CONFIG_BOOTARGS	"root=ramfs devfs=mount console=ttySA0,9600" */
/*#define CONFIG_ETHADDR	08:00:3e:26:0a:5b */
#define CONFIG_NETMASK          255.255.255.0
#define CONFIG_IPADDR		10.0.0.110
#define CONFIG_SERVERIP		10.0.0.1
/*#define CONFIG_BOOTFILE	"elinos-lart" */
/*#define CONFIG_BOOTCOMMAND	"tftp; bootm" */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CONFIG_SYS_LONGHELP				/* undef to save memory		*/
#define	CONFIG_SYS_PROMPT		"SMDK2410 # "	/* Monitor Command Prompt	*/
#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define	CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

#define CONFIG_SYS_MEMTEST_START	0x30000000	/* memtest works on	*/
#define CONFIG_SYS_MEMTEST_END		0x33F00000	/* 63 MB in DRAM	*/

#define	CONFIG_SYS_LOAD_ADDR		0x33000000	/* default load address	*/

#define	CONFIG_SYS_HZ			1000

/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x30000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

#define CONFIG_AMD_LV400	1	/* uncomment this if you have a LV400 flash */
#if 0
#define CONFIG_AMD_LV800	1	/* uncomment this if you have a LV800 flash */
#endif

#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
#ifdef CONFIG_AMD_LV800
#define PHYS_FLASH_SIZE		0x00100000 /* 1MB */
#define CONFIG_SYS_MAX_FLASH_SECT	(19)	/* max number of sectors on one chip */
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
#endif
#ifdef CONFIG_AMD_LV400
#define PHYS_FLASH_SIZE		0x00080000 /* 512KB */
#define CONFIG_SYS_MAX_FLASH_SECT	(11)	/* max number of sectors on one chip */
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
#endif

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(5*CONFIG_SYS_HZ) /* Timeout for Flash Write */

#define	CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */

#endif	/* __CONFIG_H */
Commit	Line	Data
81a8824f WD	1	/*
	2	* (C) Copyright 2002
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
792a09eb	5	* Gary Jennejohn <garyj@denx.de>
81a8824f WD	6	* David Mueller <d.mueller@elsoft.ch>
	7	*
	8	* Configuation settings for the SAMSUNG SMDK2410 board.
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#ifndef __CONFIG_H
	30	#define __CONFIG_H
	31
81a8824f WD	32	/*
	33	* High Level Configuration Options
	34	* (easy to change)
	35	*/
ac67804f	36	#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
	37	#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
	38	#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
	39	#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
81a8824f WD	40
81a8824f WD	41	/* input clock of PLL */
7f6c2cbc	42	#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
81a8824f WD	43
	44
	45	#define USE_920T_MMU 1
	46	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	47
	48	/*
	49	* Size of malloc() pool
	50	*/
6d0f6bcf JCPV	51	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
6d0f6bcf JCPV	52	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
81a8824f WD	53
	54	/*
	55	* Hardware drivers
	56	*/
b1c0eaac BW	57	#define CONFIG_NET_MULTI
	58	#define CONFIG_CS8900 /* we have a CS8900 on-board */
	59	#define CONFIG_CS8900_BASE 0x19000300
	60	#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
81a8824f WD	61
	62	/*
	63	* select serial console configuration
	64	*/
300f99f4	65	#define CONFIG_S3C24X0_SERIAL
81a8824f WD	66	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
81a8824f WD	67
48b42616 WD	68	/************************************************************
	69	* RTC
	70	************************************************************/
	71	#define CONFIG_RTC_S3C24X0 1
	72
81a8824f WD	73	/* allow to overwrite serial and ethaddr */
	74	#define CONFIG_ENV_OVERWRITE
	75
	76	#define CONFIG_BAUDRATE 115200
	77
46da1e96	78
079a136c JL	79	/*
	80	* BOOTP options
	81	*/
	82	#define CONFIG_BOOTP_BOOTFILESIZE
	83	#define CONFIG_BOOTP_BOOTPATH
	84	#define CONFIG_BOOTP_GATEWAY
	85	#define CONFIG_BOOTP_HOSTNAME
	86
	87
46da1e96 JL	88	/*
	89	* Command line configuration.
	90	*/
	91	#include <config_cmd_default.h>
	92
	93	#define CONFIG_CMD_CACHE
46da1e96 JL	94	#define CONFIG_CMD_DATE
	95	#define CONFIG_CMD_ELF
	96
81a8824f WD	97
81a8824f WD	98	#define CONFIG_BOOTDELAY 3
53677ef1	99	/#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" /
81a8824f WD	100	/#define CONFIG_ETHADDR 08:00:3e:26:0a:5b /
	101	#define CONFIG_NETMASK 255.255.255.0
	102	#define CONFIG_IPADDR 10.0.0.110
	103	#define CONFIG_SERVERIP 10.0.0.1
	104	/#define CONFIG_BOOTFILE "elinos-lart" /
	105	/#define CONFIG_BOOTCOMMAND "tftp; bootm" /
	106
46da1e96	107	#if defined(CONFIG_CMD_KGDB)
81a8824f WD	108	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	109	/* what's this ? it's not used anywhere */
	110	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	111	#endif
	112
	113	/*
	114	* Miscellaneous configurable options
	115	*/
6d0f6bcf JCPV	116	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	117	#define CONFIG_SYS_PROMPT "SMDK2410 # " /* Monitor Command Prompt */
	118	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	119	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	120	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	121	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
81a8824f	122
6d0f6bcf JCPV	123	#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
6d0f6bcf JCPV	124	#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
81a8824f	125
6d0f6bcf	126	#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
81a8824f	127
cd85662b	128	#define CONFIG_SYS_HZ 1000
81a8824f WD	129
81a8824f WD	130	/* valid baudrates */
6d0f6bcf	131	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
81a8824f WD	132
	133	/*-----------------------------------------------------------------------
	134	* Stack sizes
	135	*
	136	* The stack sizes are set up in start.S using the settings below
	137	*/
	138	#define CONFIG_STACKSIZE (1281024) / regular stack */
	139	#ifdef CONFIG_USE_IRQ
	140	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	141	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	142	#endif
	143
	144	/*-----------------------------------------------------------------------
	145	* Physical Memory Map
	146	*/
	147	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	148	#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
	149	#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
	150
	151	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	152
6d0f6bcf	153	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
81a8824f WD	154
	155	/*-----------------------------------------------------------------------
	156	* FLASH and environment organization
	157	*/
	158
	159	#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
	160	#if 0
	161	#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
	162	#endif
	163
6d0f6bcf	164	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
81a8824f WD	165	#ifdef CONFIG_AMD_LV800
81a8824f WD	166	#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
6d0f6bcf JCPV	167	#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
6d0f6bcf JCPV	168	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
81a8824f WD	169	#endif
	170	#ifdef CONFIG_AMD_LV400
	171	#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
6d0f6bcf JCPV	172	#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
6d0f6bcf JCPV	173	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
81a8824f WD	174	#endif
	175
	176	/* timeout values are in ticks */
6d0f6bcf JCPV	177	#define CONFIG_SYS_FLASH_ERASE_TOUT (5CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	178	#define CONFIG_SYS_FLASH_WRITE_TOUT (5CONFIG_SYS_HZ) / Timeout for Flash Write */
81a8824f	179
5a1aceb0	180	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586	181	#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
81a8824f WD	182
81a8824f WD	183	#endif /* __CONFIG_H */