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Commit | Line | Data |
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0257930b | 1 | /* |
39af3d8a | 2 | * LG Optimus Black codename sniper config |
0257930b PK |
3 | * |
4 | * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #include <asm/arch/cpu.h> | |
13 | #include <asm/arch/omap.h> | |
14 | ||
15 | /* | |
16 | * CPU | |
17 | */ | |
18 | ||
0257930b | 19 | #define CONFIG_ARM_ARCH_CP15_ERRATA |
0257930b | 20 | |
0257930b PK |
21 | /* |
22 | * Board | |
23 | */ | |
24 | ||
957efd4b | 25 | #define CONFIG_MISC_INIT_R |
0257930b PK |
26 | |
27 | /* | |
28 | * Clocks | |
29 | */ | |
30 | ||
31 | #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 | |
32 | #define CONFIG_SYS_PTV 2 | |
33 | ||
34 | #define V_NS16550_CLK 48000000 | |
35 | #define V_OSCK 26000000 | |
36 | #define V_SCLK (V_OSCK >> 1) | |
37 | ||
38 | /* | |
39 | * DRAM | |
40 | */ | |
41 | ||
0257930b PK |
42 | #define CONFIG_NR_DRAM_BANKS 2 |
43 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
44 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 | |
45 | ||
46 | /* | |
47 | * Memory | |
48 | */ | |
49 | ||
50 | #define CONFIG_SYS_TEXT_BASE 0x80100000 | |
23a004a6 PK |
51 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
52 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ | |
0257930b PK |
53 | GENERATED_GBL_DATA_SIZE) |
54 | ||
55 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) | |
56 | ||
0257930b PK |
57 | /* |
58 | * I2C | |
59 | */ | |
60 | ||
61 | #define CONFIG_SYS_I2C | |
62 | #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 | |
63 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
0257930b PK |
64 | #define CONFIG_I2C_MULTI_BUS |
65 | ||
0257930b PK |
66 | /* |
67 | * Input | |
68 | */ | |
69 | ||
70 | #define CONFIG_TWL4030_INPUT | |
71 | ||
0257930b PK |
72 | /* |
73 | * SPL | |
74 | */ | |
75 | ||
76 | #define CONFIG_SPL_FRAMEWORK | |
77 | ||
78 | #define CONFIG_SPL_TEXT_BASE 0x40200000 | |
fa2f81b0 TR |
79 | #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ |
80 | CONFIG_SPL_TEXT_BASE) | |
0257930b PK |
81 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 |
82 | #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) | |
83 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
84 | #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) | |
85 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK | |
86 | ||
0257930b PK |
87 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
88 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
89 | ||
0257930b PK |
90 | #define CONFIG_AUTO_COMPLETE |
91 | ||
0257930b | 92 | #define CONFIG_SYS_LONGHELP |
0257930b | 93 | |
0257930b | 94 | #define CONFIG_SYS_CBSIZE 512 |
0257930b PK |
95 | |
96 | /* | |
97 | * Serial | |
98 | */ | |
99 | ||
4fb60552 | 100 | #ifdef CONFIG_SPL_BUILD |
0257930b PK |
101 | #define CONFIG_SYS_NS16550_SERIAL |
102 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
0257930b PK |
103 | #endif |
104 | ||
c7b9686d | 105 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
0257930b PK |
106 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
107 | #define CONFIG_CONS_INDEX 3 | |
0257930b | 108 | |
0257930b PK |
109 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \ |
110 | 115200 } | |
111 | ||
112 | /* | |
113 | * Environment | |
114 | */ | |
115 | ||
116 | #define CONFIG_ENV_SIZE (128 * 1024) | |
0257930b PK |
117 | |
118 | #define CONFIG_ENV_OVERWRITE | |
119 | ||
120 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
121 | "kernel_addr_r=0x82000000\0" \ | |
1d3a8664 PK |
122 | "loadaddr=0x82000000\0" \ |
123 | "fdt_addr_r=0x88000000\0" \ | |
124 | "fdtaddr=0x88000000\0" \ | |
125 | "ramdisk_addr_r=0x88080000\0" \ | |
126 | "pxefile_addr_r=0x80100000\0" \ | |
127 | "scriptaddr=0x80000000\0" \ | |
128 | "bootm_size=0x10000000\0" \ | |
0257930b PK |
129 | "boot_mmc_dev=0\0" \ |
130 | "kernel_mmc_part=3\0" \ | |
131 | "recovery_mmc_part=4\0" \ | |
1d3a8664 PK |
132 | "fdtfile=omap3-sniper.dtb\0" \ |
133 | "bootfile=/boot/extlinux/extlinux.conf\0" \ | |
5fcbca52 | 134 | "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0" |
0257930b PK |
135 | |
136 | /* | |
1d3a8664 | 137 | * ATAGs |
0257930b PK |
138 | */ |
139 | ||
0257930b PK |
140 | #define CONFIG_SETUP_MEMORY_TAGS |
141 | #define CONFIG_CMDLINE_TAG | |
142 | #define CONFIG_INITRD_TAG | |
143 | #define CONFIG_REVISION_TAG | |
9f4e1e94 | 144 | #define CONFIG_SERIAL_TAG |
0257930b PK |
145 | |
146 | /* | |
147 | * Boot | |
148 | */ | |
149 | ||
150 | #define CONFIG_SYS_LOAD_ADDR 0x82000000 | |
0257930b | 151 | |
0257930b PK |
152 | #define CONFIG_BOOTCOMMAND \ |
153 | "setenv boot_mmc_part ${kernel_mmc_part}; " \ | |
957efd4b PK |
154 | "if test reboot-${reboot-mode} = reboot-r; then " \ |
155 | "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \ | |
fbdd3299 PK |
156 | "if test reboot-${reboot-mode} = reboot-b; then " \ |
157 | "echo fastboot; fastboot 0; fi; " \ | |
0257930b PK |
158 | "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \ |
159 | "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \ | |
160 | "mmc dev ${boot_mmc_dev}; " \ | |
161 | "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \ | |
162 | "bootm ${kernel_addr_r};" | |
163 | ||
164 | /* | |
165 | * Defaults | |
166 | */ | |
167 | ||
168 | #include <config_defaults.h> | |
1d3a8664 | 169 | #include <config_distro_defaults.h> |
0257930b PK |
170 | |
171 | #endif |