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0257930b | 1 | /* |
39af3d8a | 2 | * LG Optimus Black codename sniper config |
0257930b PK |
3 | * |
4 | * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #include <asm/arch/cpu.h> | |
13 | #include <asm/arch/omap.h> | |
14 | ||
15 | /* | |
16 | * CPU | |
17 | */ | |
18 | ||
0257930b | 19 | #define CONFIG_ARM_ARCH_CP15_ERRATA |
0257930b | 20 | |
0257930b PK |
21 | /* |
22 | * Board | |
23 | */ | |
24 | ||
957efd4b | 25 | #define CONFIG_MISC_INIT_R |
0257930b PK |
26 | |
27 | /* | |
28 | * Clocks | |
29 | */ | |
30 | ||
31 | #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 | |
32 | #define CONFIG_SYS_PTV 2 | |
33 | ||
34 | #define V_NS16550_CLK 48000000 | |
35 | #define V_OSCK 26000000 | |
36 | #define V_SCLK (V_OSCK >> 1) | |
37 | ||
38 | /* | |
39 | * DRAM | |
40 | */ | |
41 | ||
42 | #define CONFIG_SDRC | |
43 | #define CONFIG_NR_DRAM_BANKS 2 | |
44 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
45 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 | |
46 | ||
47 | /* | |
48 | * Memory | |
49 | */ | |
50 | ||
51 | #define CONFIG_SYS_TEXT_BASE 0x80100000 | |
23a004a6 PK |
52 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
53 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ | |
0257930b PK |
54 | GENERATED_GBL_DATA_SIZE) |
55 | ||
56 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) | |
57 | ||
0257930b PK |
58 | /* |
59 | * I2C | |
60 | */ | |
61 | ||
62 | #define CONFIG_SYS_I2C | |
63 | #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 | |
64 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
0257930b PK |
65 | #define CONFIG_I2C_MULTI_BUS |
66 | ||
0257930b PK |
67 | /* |
68 | * Input | |
69 | */ | |
70 | ||
71 | #define CONFIG_TWL4030_INPUT | |
72 | ||
0257930b PK |
73 | /* |
74 | * SPL | |
75 | */ | |
76 | ||
77 | #define CONFIG_SPL_FRAMEWORK | |
78 | ||
79 | #define CONFIG_SPL_TEXT_BASE 0x40200000 | |
fa2f81b0 TR |
80 | #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ |
81 | CONFIG_SPL_TEXT_BASE) | |
0257930b PK |
82 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 |
83 | #define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024) | |
84 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
85 | #define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024) | |
86 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK | |
87 | ||
0257930b PK |
88 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
89 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
90 | ||
0257930b PK |
91 | #define CONFIG_AUTO_COMPLETE |
92 | ||
0257930b | 93 | #define CONFIG_SYS_LONGHELP |
0257930b | 94 | |
0257930b | 95 | #define CONFIG_SYS_CBSIZE 512 |
0257930b PK |
96 | |
97 | /* | |
98 | * Serial | |
99 | */ | |
100 | ||
4fb60552 | 101 | #ifdef CONFIG_SPL_BUILD |
0257930b PK |
102 | #define CONFIG_SYS_NS16550_SERIAL |
103 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
0257930b PK |
104 | #endif |
105 | ||
c7b9686d | 106 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
0257930b PK |
107 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
108 | #define CONFIG_CONS_INDEX 3 | |
0257930b | 109 | |
0257930b PK |
110 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \ |
111 | 115200 } | |
112 | ||
fbdd3299 PK |
113 | /* |
114 | * USB gadget | |
115 | */ | |
116 | ||
117 | #define CONFIG_USB_MUSB_PIO_ONLY | |
118 | #define CONFIG_USB_MUSB_OMAP2PLUS | |
119 | #define CONFIG_TWL4030_USB | |
120 | ||
0257930b PK |
121 | /* |
122 | * Environment | |
123 | */ | |
124 | ||
125 | #define CONFIG_ENV_SIZE (128 * 1024) | |
0257930b PK |
126 | |
127 | #define CONFIG_ENV_OVERWRITE | |
128 | ||
129 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
130 | "kernel_addr_r=0x82000000\0" \ | |
1d3a8664 PK |
131 | "loadaddr=0x82000000\0" \ |
132 | "fdt_addr_r=0x88000000\0" \ | |
133 | "fdtaddr=0x88000000\0" \ | |
134 | "ramdisk_addr_r=0x88080000\0" \ | |
135 | "pxefile_addr_r=0x80100000\0" \ | |
136 | "scriptaddr=0x80000000\0" \ | |
137 | "bootm_size=0x10000000\0" \ | |
0257930b PK |
138 | "boot_mmc_dev=0\0" \ |
139 | "kernel_mmc_part=3\0" \ | |
140 | "recovery_mmc_part=4\0" \ | |
1d3a8664 PK |
141 | "fdtfile=omap3-sniper.dtb\0" \ |
142 | "bootfile=/boot/extlinux/extlinux.conf\0" \ | |
5fcbca52 | 143 | "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0" |
0257930b PK |
144 | |
145 | /* | |
1d3a8664 | 146 | * ATAGs |
0257930b PK |
147 | */ |
148 | ||
0257930b PK |
149 | #define CONFIG_SETUP_MEMORY_TAGS |
150 | #define CONFIG_CMDLINE_TAG | |
151 | #define CONFIG_INITRD_TAG | |
152 | #define CONFIG_REVISION_TAG | |
9f4e1e94 | 153 | #define CONFIG_SERIAL_TAG |
0257930b PK |
154 | |
155 | /* | |
156 | * Boot | |
157 | */ | |
158 | ||
159 | #define CONFIG_SYS_LOAD_ADDR 0x82000000 | |
0257930b | 160 | |
0257930b PK |
161 | #define CONFIG_BOOTCOMMAND \ |
162 | "setenv boot_mmc_part ${kernel_mmc_part}; " \ | |
957efd4b PK |
163 | "if test reboot-${reboot-mode} = reboot-r; then " \ |
164 | "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \ | |
fbdd3299 PK |
165 | "if test reboot-${reboot-mode} = reboot-b; then " \ |
166 | "echo fastboot; fastboot 0; fi; " \ | |
0257930b PK |
167 | "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \ |
168 | "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \ | |
169 | "mmc dev ${boot_mmc_dev}; " \ | |
170 | "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \ | |
171 | "bootm ${kernel_addr_r};" | |
172 | ||
173 | /* | |
174 | * Defaults | |
175 | */ | |
176 | ||
177 | #include <config_defaults.h> | |
1d3a8664 | 178 | #include <config_distro_defaults.h> |
0257930b PK |
179 | |
180 | #endif |