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Commit | Line | Data |
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77754408 | 1 | /* |
5095ee08 | 2 | * Copyright (C) 2014 Marek Vasut <marex@denx.de> |
77754408 | 3 | * |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
77754408 | 5 | */ |
5095ee08 PM |
6 | #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__ |
7 | #define __CONFIG_SOCFPGA_CYCLONE5_H__ | |
77754408 DN |
8 | |
9 | #include <asm/arch/socfpga_base_addrs.h> | |
5d649d2b | 10 | #include "../../board/altera/socfpga/pinmux_config.h" |
dc4d4aa1 | 11 | #include "../../board/altera/socfpga/iocsr_config.h" |
ddfeb0aa | 12 | #include "../../board/altera/socfpga/pll_config.h" |
77754408 | 13 | |
47f9b4e1 MV |
14 | /* U-Boot Commands */ |
15 | #define CONFIG_SYS_NO_FLASH | |
16 | #include <config_cmd_default.h> | |
17 | #define CONFIG_DOS_PARTITION | |
18 | #define CONFIG_FAT_WRITE | |
19 | #define CONFIG_HW_WATCHDOG | |
9ca2116c | 20 | |
47f9b4e1 MV |
21 | #define CONFIG_CMD_ASKENV |
22 | #define CONFIG_CMD_BOOTZ | |
23 | #define CONFIG_CMD_CACHE | |
24 | #define CONFIG_CMD_DHCP | |
25 | #define CONFIG_CMD_EXT4 | |
26 | #define CONFIG_CMD_EXT4_WRITE | |
27 | #define CONFIG_CMD_FAT | |
28 | #define CONFIG_CMD_FPGA | |
2f210639 | 29 | #define CONFIG_CMD_FS_GENERIC |
47f9b4e1 MV |
30 | #define CONFIG_CMD_GREPENV |
31 | #define CONFIG_CMD_MII | |
32 | #define CONFIG_CMD_MMC | |
33 | #define CONFIG_CMD_NET | |
34 | #define CONFIG_CMD_PING | |
35 | #define CONFIG_CMD_SETEXPR | |
77754408 | 36 | |
47f9b4e1 | 37 | #define CONFIG_REGEX /* Enable regular expression support */ |
77754408 | 38 | |
5095ee08 | 39 | /* Memory configurations */ |
47f9b4e1 | 40 | #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ |
77754408 | 41 | |
47f9b4e1 MV |
42 | /* Booting Linux */ |
43 | #define CONFIG_BOOTDELAY 3 | |
44 | #define CONFIG_BOOTFILE "zImage" | |
116f5d5b | 45 | #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) |
97ce274d | 46 | #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET |
47f9b4e1 | 47 | #define CONFIG_BOOTCOMMAND "run ramboot" |
97ce274d | 48 | #else |
47f9b4e1 | 49 | #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" |
97ce274d | 50 | #endif |
47f9b4e1 MV |
51 | #define CONFIG_LOADADDR 0x8000 |
52 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
77754408 | 53 | |
5095ee08 PM |
54 | /* Ethernet on SoC (EMAC) */ |
55 | #if defined(CONFIG_CMD_NET) | |
5a1d0ad3 | 56 | #define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS |
47f9b4e1 | 57 | #define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII |
47f9b4e1 MV |
58 | |
59 | /* PHY */ | |
47f9b4e1 MV |
60 | #define CONFIG_PHY_MICREL |
61 | #define CONFIG_PHY_MICREL_KSZ9021 | |
62 | #define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" | |
63 | #define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 | |
64 | #define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" | |
65 | #define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 | |
77754408 | 66 | |
31ad864e | 67 | #endif |
77754408 | 68 | |
5095ee08 PM |
69 | /* Extra Environment */ |
70 | #define CONFIG_HOSTNAME socfpga_cyclone5 | |
77754408 | 71 | |
47f9b4e1 MV |
72 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
73 | "verify=n\0" \ | |
74 | "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ | |
75 | "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ | |
76 | "bootm ${loadaddr} - ${fdt_addr}\0" \ | |
77 | "bootimage=zImage\0" \ | |
78 | "fdt_addr=100\0" \ | |
79 | "fdtimage=socfpga.dtb\0" \ | |
80 | "fsloadcmd=ext2load\0" \ | |
81 | "bootm ${loadaddr} - ${fdt_addr}\0" \ | |
82 | "mmcroot=/dev/mmcblk0p2\0" \ | |
83 | "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ | |
84 | " root=${mmcroot} rw rootwait;" \ | |
85 | "bootz ${loadaddr} - ${fdt_addr}\0" \ | |
86 | "mmcload=mmc rescan;" \ | |
2f210639 MV |
87 | "load mmc 0:1 ${loadaddr} ${bootimage};" \ |
88 | "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ | |
47f9b4e1 MV |
89 | "qspiroot=/dev/mtdblock0\0" \ |
90 | "qspirootfstype=jffs2\0" \ | |
91 | "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ | |
92 | " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ | |
93 | "bootm ${loadaddr} - ${fdt_addr}\0" | |
77754408 | 94 | |
5095ee08 PM |
95 | /* The rest of the configuration is shared */ |
96 | #include <configs/socfpga_common.h> | |
05b884b5 | 97 | |
5095ee08 | 98 | #endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */ |