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Commit | Line | Data |
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77754408 | 1 | /* |
5095ee08 | 2 | * Copyright (C) 2014 Marek Vasut <marex@denx.de> |
77754408 | 3 | * |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
77754408 | 5 | */ |
5095ee08 PM |
6 | #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__ |
7 | #define __CONFIG_SOCFPGA_CYCLONE5_H__ | |
77754408 DN |
8 | |
9 | #include <asm/arch/socfpga_base_addrs.h> | |
10 | ||
47f9b4e1 MV |
11 | /* U-Boot Commands */ |
12 | #define CONFIG_SYS_NO_FLASH | |
47f9b4e1 MV |
13 | #define CONFIG_DOS_PARTITION |
14 | #define CONFIG_FAT_WRITE | |
15 | #define CONFIG_HW_WATCHDOG | |
9ca2116c | 16 | |
47f9b4e1 MV |
17 | #define CONFIG_CMD_ASKENV |
18 | #define CONFIG_CMD_BOOTZ | |
19 | #define CONFIG_CMD_CACHE | |
e5e87179 | 20 | #define CONFIG_CMD_DFU |
47f9b4e1 MV |
21 | #define CONFIG_CMD_DHCP |
22 | #define CONFIG_CMD_EXT4 | |
23 | #define CONFIG_CMD_EXT4_WRITE | |
24 | #define CONFIG_CMD_FAT | |
2f210639 | 25 | #define CONFIG_CMD_FS_GENERIC |
1bd57ff5 | 26 | #define CONFIG_CMD_GPIO |
47f9b4e1 MV |
27 | #define CONFIG_CMD_GREPENV |
28 | #define CONFIG_CMD_MII | |
29 | #define CONFIG_CMD_MMC | |
47f9b4e1 | 30 | #define CONFIG_CMD_PING |
e5e87179 MV |
31 | #define CONFIG_CMD_USB |
32 | #define CONFIG_CMD_USB_MASS_STORAGE | |
77754408 | 33 | |
5095ee08 | 34 | /* Memory configurations */ |
47f9b4e1 | 35 | #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ |
77754408 | 36 | |
47f9b4e1 MV |
37 | /* Booting Linux */ |
38 | #define CONFIG_BOOTDELAY 3 | |
39 | #define CONFIG_BOOTFILE "zImage" | |
116f5d5b | 40 | #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) |
97ce274d | 41 | #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET |
47f9b4e1 | 42 | #define CONFIG_BOOTCOMMAND "run ramboot" |
97ce274d | 43 | #else |
47f9b4e1 | 44 | #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" |
97ce274d | 45 | #endif |
4c6d8b91 | 46 | #define CONFIG_LOADADDR 0x01000000 |
47f9b4e1 | 47 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
77754408 | 48 | |
5095ee08 PM |
49 | /* Ethernet on SoC (EMAC) */ |
50 | #if defined(CONFIG_CMD_NET) | |
47f9b4e1 MV |
51 | |
52 | /* PHY */ | |
47f9b4e1 MV |
53 | #define CONFIG_PHY_MICREL |
54 | #define CONFIG_PHY_MICREL_KSZ9021 | |
55 | #define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" | |
56 | #define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 | |
57 | #define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" | |
58 | #define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 | |
77754408 | 59 | |
31ad864e | 60 | #endif |
77754408 | 61 | |
68a3e32b DN |
62 | #define CONFIG_ENV_IS_IN_MMC |
63 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ | |
64 | #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ | |
65 | ||
e5e87179 MV |
66 | /* USB */ |
67 | #ifdef CONFIG_CMD_USB | |
68 | #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS | |
69 | #endif | |
70 | #define CONFIG_G_DNL_MANUFACTURER "Altera" | |
71 | ||
5095ee08 PM |
72 | /* Extra Environment */ |
73 | #define CONFIG_HOSTNAME socfpga_cyclone5 | |
77754408 | 74 | |
47f9b4e1 MV |
75 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
76 | "verify=n\0" \ | |
77 | "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ | |
78 | "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ | |
79 | "bootm ${loadaddr} - ${fdt_addr}\0" \ | |
80 | "bootimage=zImage\0" \ | |
81 | "fdt_addr=100\0" \ | |
82 | "fdtimage=socfpga.dtb\0" \ | |
83 | "fsloadcmd=ext2load\0" \ | |
84 | "bootm ${loadaddr} - ${fdt_addr}\0" \ | |
85 | "mmcroot=/dev/mmcblk0p2\0" \ | |
86 | "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ | |
87 | " root=${mmcroot} rw rootwait;" \ | |
88 | "bootz ${loadaddr} - ${fdt_addr}\0" \ | |
89 | "mmcload=mmc rescan;" \ | |
2f210639 MV |
90 | "load mmc 0:1 ${loadaddr} ${bootimage};" \ |
91 | "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ | |
47f9b4e1 MV |
92 | "qspiroot=/dev/mtdblock0\0" \ |
93 | "qspirootfstype=jffs2\0" \ | |
94 | "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ | |
95 | " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ | |
96 | "bootm ${loadaddr} - ${fdt_addr}\0" | |
77754408 | 97 | |
5095ee08 PM |
98 | /* The rest of the configuration is shared */ |
99 | #include <configs/socfpga_common.h> | |
05b884b5 | 100 | |
5095ee08 | 101 | #endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */ |