[thirdparty/u-boot.git] / include / configs / socfpga_vining_fpga.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
 */
#ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
#define __CONFIG_SAMTEC_VINING_FPGA_H__

#include <asm/arch/base_addr_ac5.h>

/* Memory configurations */
#define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on VINING_FPGA */

/* Booting Linux */
#define CONFIG_BOOTFILE		"openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
#define CONFIG_BOOTCOMMAND	"run selboot"
#define CONFIG_LOADADDR		0x01000000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

/* Ethernet on SoC (EMAC) */
#if defined(CONFIG_CMD_NET)
#define CONFIG_BOOTP_SEND_HOSTNAME
#endif

/* Extra Environment */
#define CONFIG_HOSTNAME			"socfpga_vining_fpga"

/*
 * Active LOW GPIO buttons:
 * A: GPIO 77 ... the button between USB B and ethernet
 * B: GPIO 78 ... the button between USB A ports
 *
 * The logic:
 *  if button B is not pressed, boot normal Linux system immediatelly
 *  if button B is pressed, wait $bootdelay and boot recovery system
 */

#define CONFIG_EXTRA_ENV_SETTINGS \
	"verify=n\0" \
	"consdev=ttyS0\0"						\
	"baudrate=115200\0"						\
	"bootscript=boot.scr\0"						\
	"ubimtdnr=5\0"							\
	"ubimtd=rootfs\0"						\
	"ubipart=ubi0:rootfs\0"						\
	"ubisfcs=1\0"		/* Default is flash at CS#1 */		\
	"netdev=eth0\0"							\
	"hostname=vining_fpga\0"						\
	"kernel_addr_r=0x10000000\0"					\
	"mtdparts_0=ff705000.spi.0:"					\
		"1m(u-boot),"						\
		"64k(env1),"						\
		"64k(env2),"						\
		"256k(samtec1),"					\
		"256k(samtec2),"					\
		"-(rcvrfs)\0"	/* Recovery */				\
	"mtdparts_1=ff705000.spi.1:"					\
		"32m(rootfs),"						\
		"-(userfs)\0"						\
	"update_filename=u-boot-with-spl-dtb.sfp\0"			\
	"update_qspi_offset=0x0\0"					\
	"update_qspi="		/* Update the QSPI firmware */		\
		"if sf probe ; then "					\
		"if tftp ${update_filename} ; then "			\
		"sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
		"fi ; "							\
		"fi\0"							\
	"fpga_filename=output_file.rbf\0"				\
	"load_fpga="		/* Load FPGA bitstream */		\
		"if tftp ${fpga_filename} ; then "			\
		"fpga load 0 $loadaddr $filesize ; "			\
		"bridge enable ; "					\
		"fi\0"							\
	"addcons="							\
		"setenv bootargs ${bootargs} "				\
		"console=${consdev},${baudrate}\0"			\
	"addip="							\
		"setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:"		\
			"${netmask}:${hostname}:${netdev}:off\0"	\
	"addmisc="							\
		"setenv bootargs ${bootargs} ${miscargs}\0"		\
	"addmtd="							\
		"setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; "	\
		"setenv bootargs ${bootargs} mtdparts=${mtdparts}\0"	\
	"addargs=run addcons addmtd addmisc\0"				\
	"ubiload="							\
		"ubi part ${ubimtd} ; ubifsmount ${ubipart} ; "		\
		"ubifsload ${kernel_addr_r} /boot/${bootfile}\0"	\
	"netload="							\
		"tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"	\
	"miscargs=nohlt panic=1\0"					\
	"ubiargs="							\
		"setenv bootargs ubi.mtd=${ubimtdnr} "			\
		"root=${ubipart} rootfstype=ubifs\0"			\
	"nfsargs="							\
		"setenv bootargs root=/dev/nfs rw "			\
			"nfsroot=${serverip}:${rootpath},v3,tcp\0"	\
	"ubi_sfsel="							\
		"if test \"${boottype}\" = \"rcvr\" ; then "		\
			"setenv ubisfcs 0 ; "				\
			"setenv ubimtd rcvrfs ; "			\
			"setenv ubimtdnr 5 ; "				\
			"setenv mtdparts mtdparts=${mtdparts_0} ; "	\
			"setenv mtdids nor0=ff705000.spi.0 ; "		\
			"setenv ubipart ubi0:rootfs ; "			\
		"else "							\
			"setenv ubisfcs 1 ; "				\
			"setenv ubimtd rootfs ; "			\
			"setenv ubimtdnr 6 ; "				\
			"setenv mtdparts mtdparts=${mtdparts_1} ; "	\
			"setenv mtdids nor0=ff705000.spi.1 ; "		\
			"setenv ubipart ubi0:rootfs ; "			\
		"fi ; "							\
		"sf probe 0:${ubisfcs}\0"				\
	"ubi_ubi="							\
		"run ubi_sfsel ubiload ubiargs addargs ; "		\
		"bootm ${kernel_addr_r}\0"				\
	"ubi_nfs="							\
		"run ubiload nfsargs addip addargs ; "			\
		"bootm ${kernel_addr_r}\0"				\
	"net_ubi="							\
		"run netload ubiargs addargs ; "			\
		"bootm ${kernel_addr_r}\0"				\
	"net_nfs="							\
		"run netload nfsargs addip addargs ; "			\
		"bootm ${kernel_addr_r}\0"				\
	"selboot="	/* Select from where to boot. */		\
		"if test \"${bootmode}\" = \"qspi\" ; then "		\
			"led all off ; "				\
			"if test \"${boottype}\" = \"rcvr\" ; then "	\
				"echo \"Booting recovery system\" ; "	\
				"led 3 on ; "	/* Bottom RED */	\
			"fi ; "						\
			"led 1 on ; "		/* Top RED */		\
			"run ubi_ubi ; "				\
		"else echo \"Unsupported boot mode: \"${bootmode} ; "	\
		"fi\0"							\
		"socfpga_legacy_reset_compat=1\0"

#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_OFFSET		0x100000
#define CONFIG_ENV_OFFSET_REDUND	\
	(CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)

/* Support changing the prompt string */
#define CONFIG_CMDLINE_PS_SUPPORT

/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>

#endif	/* __CONFIG_SAMTEC_VINING_FPGA_H__ */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
569a191a MV	2	/*
569a191a MV	3	* Copyright (C) 2015 Marek Vasut <marex@denx.de>
569a191a MV	4	*/
	5	#ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
	6	#define __CONFIG_SAMTEC_VINING_FPGA_H__
	7
	8	#include <asm/arch/base_addr_ac5.h>
	9
569a191a MV	10	/* Memory configurations */
	11	#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
	12
	13	/* Booting Linux */
569a191a	14	#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
569a191a MV	15	#define CONFIG_BOOTCOMMAND "run selboot"
	16	#define CONFIG_LOADADDR 0x01000000
	17	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	18
569a191a MV	19	/* Ethernet on SoC (EMAC) */
	20	#if defined(CONFIG_CMD_NET)
	21	#define CONFIG_BOOTP_SEND_HOSTNAME
569a191a MV	22	#endif
	23
	24	/* Extra Environment */
5bc0543d	25	#define CONFIG_HOSTNAME "socfpga_vining_fpga"
569a191a MV	26
	27	/*
	28	* Active LOW GPIO buttons:
	29	* A: GPIO 77 ... the button between USB B and ethernet
	30	* B: GPIO 78 ... the button between USB A ports
	31	*
	32	* The logic:
	33	* if button B is not pressed, boot normal Linux system immediatelly
	34	* if button B is pressed, wait $bootdelay and boot recovery system
	35	*/
569a191a MV	36
	37	#define CONFIG_EXTRA_ENV_SETTINGS \
	38	"verify=n\0" \
	39	"consdev=ttyS0\0" \
	40	"baudrate=115200\0" \
	41	"bootscript=boot.scr\0" \
	42	"ubimtdnr=5\0" \
	43	"ubimtd=rootfs\0" \
	44	"ubipart=ubi0:rootfs\0" \
	45	"ubisfcs=1\0" /* Default is flash at CS#1 */ \
	46	"netdev=eth0\0" \
	47	"hostname=vining_fpga\0" \
	48	"kernel_addr_r=0x10000000\0" \
	49	"mtdparts_0=ff705000.spi.0:" \
	50	"1m(u-boot)," \
	51	"64k(env1)," \
	52	"64k(env2)," \
	53	"256k(samtec1)," \
	54	"256k(samtec2)," \
	55	"-(rcvrfs)\0" /* Recovery */ \
	56	"mtdparts_1=ff705000.spi.1:" \
	57	"32m(rootfs)," \
	58	"-(userfs)\0" \
	59	"update_filename=u-boot-with-spl-dtb.sfp\0" \
	60	"update_qspi_offset=0x0\0" \
	61	"update_qspi=" /* Update the QSPI firmware */ \
	62	"if sf probe ; then " \
	63	"if tftp ${update_filename} ; then " \
	64	"sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
	65	"fi ; " \
	66	"fi\0" \
	67	"fpga_filename=output_file.rbf\0" \
	68	"load_fpga=" /* Load FPGA bitstream */ \
	69	"if tftp ${fpga_filename} ; then " \
	70	"fpga load 0 $loadaddr $filesize ; " \
	71	"bridge enable ; " \
	72	"fi\0" \
	73	"addcons=" \
	74	"setenv bootargs ${bootargs} " \
	75	"console=${consdev},${baudrate}\0" \
	76	"addip=" \
	77	"setenv bootargs ${bootargs} " \
	78	"ip=${ipaddr}:${serverip}:${gatewayip}:" \
	79	"${netmask}:${hostname}:${netdev}:off\0" \
	80	"addmisc=" \
	81	"setenv bootargs ${bootargs} ${miscargs}\0" \
	82	"addmtd=" \
	83	"setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
	84	"setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
	85	"addargs=run addcons addmtd addmisc\0" \
	86	"ubiload=" \
	87	"ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
	88	"ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
	89	"netload=" \
	90	"tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
	91	"miscargs=nohlt panic=1\0" \
	92	"ubiargs=" \
	93	"setenv bootargs ubi.mtd=${ubimtdnr} " \
	94	"root=${ubipart} rootfstype=ubifs\0" \
	95	"nfsargs=" \
	96	"setenv bootargs root=/dev/nfs rw " \
	97	"nfsroot=${serverip}:${rootpath},v3,tcp\0" \
	98	"ubi_sfsel=" \
	99	"if test \"${boottype}\" = \"rcvr\" ; then " \
100	"setenv ubisfcs 0 ; " \
101	"setenv ubimtd rcvrfs ; " \
102	"setenv ubimtdnr 5 ; " \
103	"setenv mtdparts mtdparts=${mtdparts_0} ; " \
104	"setenv mtdids nor0=ff705000.spi.0 ; " \
105	"setenv ubipart ubi0:rootfs ; " \
106	"else " \
107	"setenv ubisfcs 1 ; " \
108	"setenv ubimtd rootfs ; " \
109	"setenv ubimtdnr 6 ; " \
110	"setenv mtdparts mtdparts=${mtdparts_1} ; " \
111	"setenv mtdids nor0=ff705000.spi.1 ; " \
112	"setenv ubipart ubi0:rootfs ; " \
113	"fi ; " \
114	"sf probe 0:${ubisfcs}\0" \
115	"ubi_ubi=" \
116	"run ubi_sfsel ubiload ubiargs addargs ; " \
117	"bootm ${kernel_addr_r}\0" \
118	"ubi_nfs=" \
119	"run ubiload nfsargs addip addargs ; " \
120	"bootm ${kernel_addr_r}\0" \
121	"net_ubi=" \
122	"run netload ubiargs addargs ; " \
123	"bootm ${kernel_addr_r}\0" \
124	"net_nfs=" \
125	"run netload nfsargs addip addargs ; " \
126	"bootm ${kernel_addr_r}\0" \
127	"selboot=" /* Select from where to boot. */ \
128	"if test \"${bootmode}\" = \"qspi\" ; then " \
129	"led all off ; " \
130	"if test \"${boottype}\" = \"rcvr\" ; then " \
131	"echo \"Booting recovery system\" ; " \
132	"led 3 on ; " /* Bottom RED */ \
133	"fi ; " \
134	"led 1 on ; " /* Top RED */ \
135	"run ubi_ubi ; " \
136	"else echo \"Unsupported boot mode: \"${bootmode} ; " \
137	"fi\0" \
b94655a4	138	"socfpga_legacy_reset_compat=1\0"
569a191a	139
569a191a MV	140	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	141	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	142	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	143	#define CONFIG_ENV_OFFSET 0x100000
	144	#define CONFIG_ENV_OFFSET_REDUND \
	145	(CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
	146
569a191a MV	147	/* Support changing the prompt string */
	148	#define CONFIG_CMDLINE_PS_SUPPORT
	149
	150	/* The rest of the configuration is shared */
	151	#include <configs/socfpga_common.h>
	152
	153	#endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */