projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| e66c49fa | 2 | /* |
| 3bc599c9 PC |
3 | * Copyright (C) 2016, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. | |
| e66c49fa VM |
5 | */ |
| 6 | ||
| 7 | #ifndef __CONFIG_H | |
| 8 | #define __CONFIG_H | |
| 9 | ||
| e66c49fa VM |
10 | #define CONFIG_SYS_FLASH_BASE 0x08000000 |
| 11 | #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 | |
| b9747696 VM |
12 | |
| 13 | #ifdef CONFIG_SUPPORT_SPL | |
| 1a73bd84 | 14 | #define CONFIG_SYS_LOAD_ADDR 0x08008000 |
| b9747696 | 15 | #else |
| 1a73bd84 VM |
16 | #define CONFIG_SYS_LOAD_ADDR 0xC0400000 |
| 17 | #define CONFIG_LOADADDR 0xC0400000 | |
| b9747696 | 18 | #endif |
| e66c49fa | 19 | |
| e66c49fa VM |
20 | /* |
| 21 | * Configuration of the external SDRAM memory | |
| 22 | */ | |
| e66c49fa | 23 | |
| adcc90b4 VM |
24 | #define CONFIG_SYS_MAX_FLASH_SECT 8 |
| 25 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
| e66c49fa | 26 | |
| adcc90b4 | 27 | #define CONFIG_STM32_FLASH |
| e66c49fa | 28 | |
| b20b70fc MK |
29 | #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) |
| 30 | #define CONFIG_DW_ALTDESCRIPTOR | |
| fc0d3dbc | 31 | #define CONFIG_PHY_SMSC |
| b20b70fc | 32 | |
| e66c49fa VM |
33 | #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ |
| 34 | ||
| 35 | #define CONFIG_CMDLINE_TAG | |
| 36 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 37 | #define CONFIG_INITRD_TAG | |
| 38 | #define CONFIG_REVISION_TAG | |
| 39 | ||
| 40 | #define CONFIG_SYS_CBSIZE 1024 | |
| e66c49fa | 41 | |
| b20b70fc | 42 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) |
| e66c49fa | 43 | |
| 019ce052 PC |
44 | #define BOOT_TARGET_DEVICES(func) \ |
| 45 | func(MMC, mmc, 0) | |
| 46 | ||
| 47 | #include <config_distro_bootcmd.h> | |
| 48 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 49 | "kernel_addr_r=0xC0008000\0" \ | |
| 50 | "fdtfile=stm32f746-disco.dtb\0" \ | |
| 51 | "fdt_addr_r=0xC0500000\0" \ | |
| 52 | "scriptaddr=0xC0008000\0" \ | |
| 53 | "pxefile_addr_r=0xC0008000\0" \ | |
| 54 | "fdt_high=0xffffffffffffffff\0" \ | |
| 55 | "initrd_high=0xffffffffffffffff\0" \ | |
| f77b9ab9 | 56 | "ramdisk_addr_r=0xC0600000\0" \ |
| 019ce052 | 57 | BOOTENV |
| e66c49fa VM |
58 | |
| 59 | /* | |
| 60 | * Command line configuration. | |
| 61 | */ | |
| 2f80a9f7 | 62 | #define CONFIG_BOARD_LATE_INIT |
| a241c241 | 63 | #define CONFIG_DISPLAY_BOARDINFO |
| b9747696 VM |
64 | |
| 65 | /* For SPL */ | |
| 66 | #ifdef CONFIG_SUPPORT_SPL | |
| 67 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR | |
| b9747696 VM |
68 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
| 69 | #define CONFIG_SYS_SPL_LEN 0x00008000 | |
| 1a73bd84 | 70 | #define CONFIG_SYS_UBOOT_START 0x080083FD |
| b9747696 VM |
71 | #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ |
| 72 | CONFIG_SYS_SPL_LEN) | |
| 55a3ef71 | 73 | |
| 55a3ef71 | 74 | /* DT blob (fdt) address */ |
| 55a3ef71 VM |
75 | #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ |
| 76 | 0x1C0000) | |
| b9747696 VM |
77 | #endif |
| 78 | /* For SPL ends */ | |
| 79 | ||
| 92eac584 | 80 | /* For splashcreen */ |
| 81 | #ifdef CONFIG_DM_VIDEO | |
| 82 | #define CONFIG_VIDEO_BMP_RLE8 | |
| 83 | #define CONFIG_BMP_16BPP | |
| 84 | #define CONFIG_BMP_24BPP | |
| 85 | #define CONFIG_BMP_32BPP | |
| 86 | #define CONFIG_SPLASH_SCREEN | |
| 87 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
| 88 | #endif | |
| 89 | ||
| e66c49fa | 90 | #endif /* __CONFIG_H */ |