[thirdparty/u-boot.git] / include / configs / stmark2.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Sysam stmark2 board configuration
 *
 * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
 */

#ifndef __STMARK2_CONFIG_H
#define __STMARK2_CONFIG_H

#define CONFIG_HOSTNAME			"stmark2"

#define CONFIG_SYS_UART_PORT		0

#define LDS_BOARD_TEXT						\
	board/sysam/stmark2/sbf_dram_init.o (.text*)

#define CONFIG_EXTRA_ENV_SETTINGS				\
	"kern_size=0x700000\0"					\
	"loadaddr=0x40001000\0"					\
		"-(rootfs)\0"					\
	"update_uboot=loady ${loadaddr}; "			\
		"sf probe 0:1 50000000; "			\
		"sf erase 0 0x80000; "				\
		"sf write ${loadaddr} 0 ${filesize}\0"		\
	"update_kernel=loady ${loadaddr}; "			\
		"setenv kern_size ${filesize}; saveenv; "	\
		"sf probe 0:1 50000000; "			\
		"sf erase 0x100000 0x700000; "			\
		"sf write ${loadaddr} 0x100000 ${filesize}\0"	\
	"update_rootfs=loady ${loadaddr}; "			\
		"sf probe 0:1 50000000; "			\
		"sf erase 0x00800000 0x100000; "		\
		"sf write ${loadaddr} 0x00800000 ${filesize}\0"	\
	""

/* Realtime clock */
#undef CONFIG_MCFRTC
#define CONFIG_RTC_MCFRRTC
#define CONFIG_SYS_MCFRRTC_BASE		0xFC0A8000

/* Timer */
#define CONFIG_MCFTMR

/* DSPI and Serial Flash */
#define CONFIG_CF_DSPI
#define CONFIG_SERIAL_FLASH

#define CONFIG_SYS_SBFHDR_SIZE		0x7

/* Input, PCI, Flexbus, and VCO */
#define CONFIG_EXTRA_CLOCK

#define CONFIG_PRAM			2048	/* 2048 KB */
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
/* Boot Argument Buffer Size    */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MBAR			0xFC000000

/*
 * Definitions for initial stack pointer and data area (in internal SRAM)
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
/* End of used area in internal SRAM */
#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
#define CONFIG_SYS_INIT_RAM_CTRL	0x221
#define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE) - 32)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_SBFHDR_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - 32)

/*
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		128	/* SDRAM size in MB */

#define CONFIG_SYS_DRAM_TEST

#if defined(CONFIG_CF_SBF)
#define CONFIG_SERIAL_BOOT
#endif

#if defined(CONFIG_SERIAL_BOOT)
#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_TEXT_BASE + 0x400)
#else
#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
#endif

#define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
/* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization ??
 */
/* Initial Memory map for Linux */
#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
					(CONFIG_SYS_SDRAM_SIZE << 20))

/* Configuration for environment
 * Environment is embedded in u-boot in the second sector of the flash
 */

/* Cache Configuration */
#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 4)
#define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA)
#define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
#define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
					 CF_ACR_EN | CF_ACR_SM_ALL)
#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_IEC | \
					 CF_CACR_ICINVA | CF_CACR_EUSP)
#define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
					 CF_CACR_DEC | CF_CACR_DDCM_P | \
					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)

#define CACR_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - 12)

#ifdef CONFIG_MCFFEC
#define CONFIG_MII_INIT			1
#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_SYS_RX_ETH_BUFFER	8
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
#ifndef CONFIG_SYS_DISCOVER_PHY
#define FECDUPLEX			FULL
#define FECSPEED			_100BASET
#else
#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#endif
#endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
#endif /* __STMARK2_CONFIG_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
a373024e AD	2	/*
	3	* Sysam stmark2 board configuration
	4	*
	5	* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
a373024e AD	6	*/
	7
	8	#ifndef __STMARK2_CONFIG_H
	9	#define __STMARK2_CONFIG_H
	10
5bc0543d	11	#define CONFIG_HOSTNAME "stmark2"
a373024e	12
a373024e	13	#define CONFIG_SYS_UART_PORT 0
a373024e AD	14
	15	#define LDS_BOARD_TEXT \
	16	board/sysam/stmark2/sbf_dram_init.o (.text*)
	17
a373024e AD	18	#define CONFIG_EXTRA_ENV_SETTINGS \
	19	"kern_size=0x700000\0" \
	20	"loadaddr=0x40001000\0" \
	21	"-(rootfs)\0" \
	22	"update_uboot=loady ${loadaddr}; " \
	23	"sf probe 0:1 50000000; " \
	24	"sf erase 0 0x80000; " \
	25	"sf write ${loadaddr} 0 ${filesize}\0" \
	26	"update_kernel=loady ${loadaddr}; " \
	27	"setenv kern_size ${filesize}; saveenv; " \
	28	"sf probe 0:1 50000000; " \
	29	"sf erase 0x100000 0x700000; " \
	30	"sf write ${loadaddr} 0x100000 ${filesize}\0" \
	31	"update_rootfs=loady ${loadaddr}; " \
	32	"sf probe 0:1 50000000; " \
	33	"sf erase 0x00800000 0x100000; " \
	34	"sf write ${loadaddr} 0x00800000 ${filesize}\0" \
	35	""
	36
	37	/* Realtime clock */
	38	#undef CONFIG_MCFRTC
	39	#define CONFIG_RTC_MCFRRTC
	40	#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
	41
a373024e AD	42	/* Timer */
a373024e AD	43	#define CONFIG_MCFTMR
a373024e AD	44
a373024e AD	45	/* DSPI and Serial Flash */
a373024e	46	#define CONFIG_CF_DSPI
a373024e	47	#define CONFIG_SERIAL_FLASH
a373024e AD	48
	49	#define CONFIG_SYS_SBFHDR_SIZE 0x7
	50
a373024e AD	51	/* Input, PCI, Flexbus, and VCO */
	52	#define CONFIG_EXTRA_CLOCK
	53
	54	#define CONFIG_PRAM 2048 /* 2048 KB */
a373024e AD	55	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	56
	57	/* Print Buffer Size */
	58	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	59	sizeof(CONFIG_SYS_PROMPT) + 16)
	60	#define CONFIG_SYS_MAXARGS 16
	61	/* Boot Argument Buffer Size */
	62	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	63
a373024e AD	64	#define CONFIG_SYS_MBAR 0xFC000000
	65
	66	/*
	67	* Definitions for initial stack pointer and data area (in internal SRAM)
	68	*/
	69	#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
	70	/* End of used area in internal SRAM */
	71	#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
	72	#define CONFIG_SYS_INIT_RAM_CTRL 0x221
	73	#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
	74	GENERATED_GBL_DATA_SIZE) - 32)
	75	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
	76	#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
	77
	78	/*
	79	* Start addresses for the final memory configuration
	80	* (Set up by the startup code)
	81	* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
	82	*/
	83	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	84	#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
	85
a373024e AD	86	#define CONFIG_SYS_DRAM_TEST
	87
	88	#if defined(CONFIG_CF_SBF)
	89	#define CONFIG_SERIAL_BOOT
	90	#endif
	91
	92	#if defined(CONFIG_SERIAL_BOOT)
	93	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
	94	#else
	95	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
	96	#endif
	97
	98	#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
	99	/* Reserve 256 kB for Monitor */
	100	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
a373024e AD	101
	102	/*
	103	* For booting Linux, the board info and command line data
	104	* have to be in the first 8 MB of memory, since this is
	105	* the maximum mapped by the Linux kernel during initialization ??
	106	*/
	107	/* Initial Memory map for Linux */
	108	#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
	109	(CONFIG_SYS_SDRAM_SIZE << 20))
	110
	111	/* Configuration for environment
	112	* Environment is embedded in u-boot in the second sector of the flash
	113	*/
	114
a373024e	115	/* Cache Configuration */
a373024e AD	116	#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
	117	CONFIG_SYS_INIT_RAM_SIZE - 8)
	118	#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
	119	CONFIG_SYS_INIT_RAM_SIZE - 4)
	120	#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
	121	#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
	122	#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE \| \
	123	CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) \| \
	124	CF_ACR_EN \| CF_ACR_SM_ALL)
	125	#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC \| CF_CACR_IEC \| \
	126	CF_CACR_ICINVA \| CF_CACR_EUSP)
	127	#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR \| \
	128	CF_CACR_DEC \| CF_CACR_DDCM_P \| \
	129	CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
	130
	131	#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
	132	CONFIG_SYS_INIT_RAM_SIZE - 12)
	133
ff56f2b7 AD	134	#ifdef CONFIG_MCFFEC
	135	#define CONFIG_MII_INIT 1
	136	#define CONFIG_SYS_DISCOVER_PHY
	137	#define CONFIG_SYS_RX_ETH_BUFFER 8
	138	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	139	/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
	140	#ifndef CONFIG_SYS_DISCOVER_PHY
	141	#define FECDUPLEX FULL
	142	#define FECSPEED _100BASET
	143	#else
	144	#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	145	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
	146	#endif
	147	#endif /* CONFIG_SYS_DISCOVER_PHY */
	148	#endif
a373024e	149	#endif /* __STMARK2_CONFIG_H */