[thirdparty/u-boot.git] / include / configs / sunxi-common.h

/*
 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
 *
 * (C) Copyright 2007-2011
 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
 * Tom Cubie <tangliang@allwinnertech.com>
 *
 * Configuration settings for the Allwinner sunxi series of boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H

#include <linux/stringify.h>

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
/*
 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
 * expense of restricting some features, so the regular machine id values can
 * be used.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	0
#else
/*
 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
 * beyond the machine id check.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	1
#endif

/*
 * High Level Configuration Options
 */
#define CONFIG_SUNXI		/* sunxi family */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
#endif

#include <asm/arch/cpu.h>	/* get chip and board defs */

#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
# define CONFIG_DW_SERIAL
#endif

/*
 * Display CPU information
 */
#define CONFIG_DISPLAY_CPUINFO

/* Serial & console */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK		24000000
#ifndef CONFIG_DM_SERIAL
# define CONFIG_SYS_NS16550_REG_SIZE	-4
# define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
# define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
# define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
#endif

/* CPU */
#define CONFIG_SYS_CACHELINE_SIZE	64

/*
 * The DRAM Base differs between some models. We cannot use macros for the
 * CONFIG_FOO defines which contain the DRAM base address since they end
 * up unexpanded in include/autoconf.mk .
 *
 * So we have to have this #ifdef #else #endif block for these.
 */
#ifdef CONFIG_MACH_SUN9I
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x2a000000
#define CONFIG_PRE_CON_BUF_ADDR		0x2f000000
#define CONFIG_SYS_SPL_MALLOC_START	0x2ff00000
#define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
#else
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x4a000000
#define CONFIG_PRE_CON_BUF_ADDR		0x4f000000
#define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
#define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
#endif

#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000 /* 512 KiB */

#ifdef CONFIG_MACH_SUN9I
/*
 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
 * slightly bigger. Note that it is possible to map the first 32 KiB of the
 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x10000
#define CONFIG_SYS_INIT_RAM_SIZE	0x0a000	/* 40 KiB */
#else
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
#endif

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SUNXI_AHCI
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_CMD_SCSI
#endif

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG

#if defined(CONFIG_SPL_NAND_SUNXI)
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_SUPPORT

#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000

#endif


/* mmc config */
#if !defined(CONFIG_UART0_PORT_F)
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_MMC
#define CONFIG_MMC_SUNXI
#define CONFIG_MMC_SUNXI_SLOT		0
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
#endif

/* 4MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_GENERIC_BOARD

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* standalone support */
#define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR

/* baudrate */
#define CONFIG_BAUDRATE			115200

/* The stack sizes are set up in start.S using the settings below */
#define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */

/* FLASH and environment organization */

#define CONFIG_SYS_NO_FLASH

#define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
#define CONFIG_IDENT_STRING		" Allwinner Technology"

#define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */

#define CONFIG_FAT_WRITE	/* enable write access */

#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT

#define CONFIG_SPL_BOARD_LOAD_IMAGE

#define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */

#define CONFIG_SPL_LIBDISK_SUPPORT

#if !defined(CONFIG_UART0_PORT_F)
#define CONFIG_SPL_MMC_SUPPORT
#endif

#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"

#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
#define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */

/* end of 32 KiB in sram */
#define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
#define CONFIG_SPL_I2C_SUPPORT
#endif

#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
    defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
    defined CONFIG_I2C4_ENABLE
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x7f
#define CONFIG_CMD_I2C
#endif

#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C_SOFT_SPEED	50000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
#define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
#ifndef __ASSEMBLY__
extern int soft_i2c_gpio_sda;
extern int soft_i2c_gpio_scl;
#endif
#define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
#define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
#else
#define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
#define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
#endif

/* PMU */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
#define CONFIG_SPL_POWER_SUPPORT
#endif

#ifndef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX              1       /* UART0 */
#endif

#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
#define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
#else
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
#endif
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
#else
#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
#endif
#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */

/* GPIO */
#define CONFIG_SUNXI_GPIO
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_CMD_GPIO

#ifdef CONFIG_VIDEO
/*
 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
 * to use as framebuffer. This must be a multiple of 4096.
 */
#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)

/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB

#define CONFIG_VIDEO_SUNXI

#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_STD_TIMINGS
#define CONFIG_I2C_EDID

/* allow both serial and cfb console. */
#define CONFIG_CONSOLE_MUX
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
#define CONFIG_VGA_AS_SINGLE_DEVICE

/* To be able to hook simplefb into dt */
#ifdef CONFIG_VIDEO_DT_SIMPLEFB
#define CONFIG_OF_BOARD_SETUP
#endif

#endif /* CONFIG_VIDEO */

/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHYLIB
#endif

#ifdef CONFIG_SUNXI_GMAC
#define CONFIG_DW_AUTONEG
#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHYLIB
#endif

#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif

#ifdef CONFIG_USB_MUSB_SUNXI
#define CONFIG_USB_MUSB_PIO_ONLY
#endif

#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW	0

#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_G_DNL_VENDOR_NUM		0x1f3a
#define CONFIG_G_DNL_PRODUCT_NUM	0x1010
#define CONFIG_G_DNL_MANUFACTURER	"Allwinner Technology"
#endif

#ifdef CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x2000000

#define CONFIG_FASTBOOT_FLASH
#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
#define CONFIG_EFI_PARTITION
#endif

#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#define CONFIG_CMD_USB_MASS_STORAGE
#endif

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_CONSOLE_MUX
#define CONFIG_PREBOOT
#define CONFIG_SYS_STDIO_DEREGISTER
#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
#endif

#if !defined CONFIG_ENV_IS_IN_MMC && \
    !defined CONFIG_ENV_IS_IN_NAND && \
    !defined CONFIG_ENV_IS_IN_FAT && \
    !defined CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_IS_NOWHERE
#endif

#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>

/* Enable pre-console buffer to get complete log on the VGA console */
#define CONFIG_PRE_CONSOLE_BUFFER
#define CONFIG_PRE_CON_BUF_SZ		4096 /* Aprox 2 80*25 screens */

/*
 * 240M RAM (256M minimum minus space for the framebuffer),
 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */
#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=0xf000000\0" \
	"kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
	"fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
	"scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
	"pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
	"ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"

#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#endif

#ifdef CONFIG_AHCI
#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
#else
#define BOOT_TARGET_DEVICES_SCSI(func)
#endif

#ifdef CONFIG_USB_STORAGE
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

#define BOOT_TARGET_DEVICES(func) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_SCSI(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#include <config_distro_bootcmd.h>

#ifdef CONFIG_USB_KEYBOARD
#define CONSOLE_STDIN_SETTINGS \
	"preboot=usb start\0" \
	"stdin=serial,usbkbd\0"
#else
#define CONSOLE_STDIN_SETTINGS \
	"stdin=serial\0"
#endif

#ifdef CONFIG_VIDEO
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vga\0" \
	"stderr=serial,vga\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial\0" \
	"stderr=serial\0"
#endif

#define CONSOLE_ENV_SETTINGS \
	CONSOLE_STDIN_SETTINGS \
	CONSOLE_STDOUT_SETTINGS

#define CONFIG_EXTRA_ENV_SETTINGS \
	CONSOLE_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
	"console=ttyS0,115200\0" \
	BOOTENV

#else /* ifndef CONFIG_SPL_BUILD */
#define CONFIG_EXTRA_ENV_SETTINGS
#endif

#endif /* _SUNXI_COMMON_CONFIG_H */
Commit	Line	Data
cba69eee IC	1	/*
	2	* (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
	3	*
	4	* (C) Copyright 2007-2011
	5	* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
	6	* Tom Cubie <tangliang@allwinnertech.com>
	7	*
	8	* Configuration settings for the Allwinner sunxi series of boards.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef _SUNXI_COMMON_CONFIG_H
	14	#define _SUNXI_COMMON_CONFIG_H
	15
e049fe28 HG	16	#include <linux/stringify.h>
e049fe28 HG	17
77ef1369 SS	18	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	19	/*
	20	* The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
	21	* expense of restricting some features, so the regular machine id values can
	22	* be used.
	23	*/
	24	# define CONFIG_MACH_TYPE_COMPAT_REV 0
	25	#else
	26	/*
	27	* A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
	28	* Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
	29	* beyond the machine id check.
	30	*/
	31	# define CONFIG_MACH_TYPE_COMPAT_REV 1
	32	#endif
	33
cba69eee IC	34	/*
	35	* High Level Configuration Options
	36	*/
	37	#define CONFIG_SUNXI /* sunxi family */
50827a59	38	#ifdef CONFIG_SPL_BUILD
50827a59 IC	39	#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
50827a59 IC	40	#endif
cba69eee IC	41
	42	#include <asm/arch/cpu.h> /* get chip and board defs */
	43
b6006baf	44	#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
1a81cf83	45	# define CONFIG_DW_SERIAL
57f878ef SG	46	#endif
57f878ef SG	47
cba69eee IC	48	/*
	49	* Display CPU information
	50	*/
	51	#define CONFIG_DISPLAY_CPUINFO
	52
	53	/* Serial & console */
	54	#define CONFIG_SYS_NS16550
	55	#define CONFIG_SYS_NS16550_SERIAL
	56	/* ns16550 reg in the low bits of cpu reg */
cba69eee	57	#define CONFIG_SYS_NS16550_CLK 24000000
1a81cf83 SG	58	#ifndef CONFIG_DM_SERIAL
	59	# define CONFIG_SYS_NS16550_REG_SIZE -4
	60	# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
	61	# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
	62	# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
	63	# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
	64	# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
	65	#endif
cba69eee	66
8a65f69c PK	67	/* CPU */
	68	#define CONFIG_SYS_CACHELINE_SIZE 64
	69
e049fe28 HG	70	/*
	71	* The DRAM Base differs between some models. We cannot use macros for the
	72	* CONFIG_FOO defines which contain the DRAM base address since they end
	73	* up unexpanded in include/autoconf.mk .
	74	*
	75	* So we have to have this #ifdef #else #endif block for these.
	76	*/
	77	#ifdef CONFIG_MACH_SUN9I
	78	#define SDRAM_OFFSET(x) 0x2##x
	79	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	80	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
	81	#define CONFIG_SYS_TEXT_BASE 0x2a000000
	82	#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
	83	#define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000
	84	#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
	85	#else
	86	#define SDRAM_OFFSET(x) 0x4##x
cba69eee	87	#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28 HG	88	#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
	89	#define CONFIG_SYS_TEXT_BASE 0x4a000000
	90	#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
	91	#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
	92	#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
	93	#endif
	94
	95	#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
	96	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
	97
77fe9887 HG	98	#ifdef CONFIG_MACH_SUN9I
	99	/*
	100	* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
	101	* slightly bigger. Note that it is possible to map the first 32 KiB of the
	102	* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
	103	* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
	104	* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
	105	*/
	106	#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
	107	#define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */
	108	#else
cba69eee IC	109	#define CONFIG_SYS_INIT_RAM_ADDR 0x0
cba69eee IC	110	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887	111	#endif
cba69eee IC	112
	113	#define CONFIG_SYS_INIT_SP_OFFSET \
	114	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	115	#define CONFIG_SYS_INIT_SP_ADDR \
	116	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	117
	118	#define CONFIG_NR_DRAM_BANKS 1
	119	#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
	120	#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
	121
a6e50a88 IC	122	#ifdef CONFIG_AHCI
	123	#define CONFIG_LIBATA
	124	#define CONFIG_SCSI_AHCI
	125	#define CONFIG_SCSI_AHCI_PLAT
	126	#define CONFIG_SUNXI_AHCI
0751b138	127	#define CONFIG_SYS_64BIT_LBA
a6e50a88 IC	128	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	129	#define CONFIG_SYS_SCSI_MAX_LUN 1
	130	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	131	CONFIG_SYS_SCSI_MAX_LUN)
	132	#define CONFIG_CMD_SCSI
	133	#endif
	134
cba69eee IC	135	#define CONFIG_SETUP_MEMORY_TAGS
	136	#define CONFIG_CMDLINE_TAG
	137	#define CONFIG_INITRD_TAG
9f852211	138	#define CONFIG_SERIAL_TAG
cba69eee	139
960caeba PZ	140	#if defined(CONFIG_SPL_NAND_SUNXI)
	141	#define CONFIG_SPL_NAND_DRIVERS
	142	#define CONFIG_SPL_NAND_SUPPORT
	143
	144	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	145	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000
	146
	147	#endif
	148
	149
e24ea55c	150	/* mmc config */
ff2b47f6	151	#if !defined(CONFIG_UART0_PORT_F)
e24ea55c IC	152	#define CONFIG_MMC
	153	#define CONFIG_GENERIC_MMC
	154	#define CONFIG_CMD_MMC
	155	#define CONFIG_MMC_SUNXI
	156	#define CONFIG_MMC_SUNXI_SLOT 0
e24ea55c IC	157	#define CONFIG_ENV_IS_IN_MMC
e24ea55c IC	158	#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ff2b47f6	159	#endif
e24ea55c	160
cba69eee IC	161	/* 4MB of malloc() pool */
	162	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
	163
	164	/*
	165	* Miscellaneous configurable options
	166	*/
06beadb0 IC	167	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
06beadb0 IC	168	#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee IC	169	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	170	#define CONFIG_SYS_GENERIC_BOARD
	171
	172	/* Boot Argument Buffer Size */
	173	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	174
cba69eee	175	/* standalone support */
e049fe28	176	#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee	177
cba69eee IC	178	/* baudrate */
	179	#define CONFIG_BAUDRATE 115200
	180
	181	/* The stack sizes are set up in start.S using the settings below */
	182	#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
	183
	184	/* FLASH and environment organization */
	185
	186	#define CONFIG_SYS_NO_FLASH
	187
	188	#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
	189	#define CONFIG_IDENT_STRING " Allwinner Technology"
	190
e24ea55c	191	#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
cba69eee IC	192	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
cba69eee IC	193
cba69eee IC	194	#define CONFIG_FAT_WRITE /* enable write access */
	195
	196	#define CONFIG_SPL_FRAMEWORK
	197	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	198	#define CONFIG_SPL_SERIAL_SUPPORT
	199	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	200
942cb0b6 SG	201	#define CONFIG_SPL_BOARD_LOAD_IMAGE
942cb0b6 SG	202
50827a59 IC	203	#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
	204	#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
	205
	206	#define CONFIG_SPL_LIBDISK_SUPPORT
f0ce28e9 SS	207
f0ce28e9 SS	208	#if !defined(CONFIG_UART0_PORT_F)
50827a59	209	#define CONFIG_SPL_MMC_SUPPORT
f0ce28e9	210	#endif
50827a59 IC	211
	212	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
	213
	214	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
	215	#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
	216
cba69eee IC	217	/* end of 32 KiB in sram */
	218	#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
	219	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
cba69eee	220
6620377e	221	/* I2C */
ad40610b	222	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER
6620377e	223	#define CONFIG_SPL_I2C_SUPPORT
ad40610b HG	224	#endif
ad40610b HG	225
6c739c5d PK	226	#if defined CONFIG_I2C0_ENABLE \|\| defined CONFIG_I2C1_ENABLE \|\| \
	227	defined CONFIG_I2C2_ENABLE \|\| defined CONFIG_I2C3_ENABLE \|\| \
	228	defined CONFIG_I2C4_ENABLE
8b2db32a	229	#define CONFIG_SYS_I2C
6620377e HG	230	#define CONFIG_SYS_I2C_MVTWSI
	231	#define CONFIG_SYS_I2C_SPEED 400000
	232	#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a HG	233	#define CONFIG_CMD_I2C
8b2db32a HG	234	#endif
55410089 HG	235
	236	#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
	237	#define CONFIG_SYS_I2C_SOFT
	238	#define CONFIG_SYS_I2C_SOFT_SPEED 50000
	239	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089 HG	240	/* We use pin names in Kconfig and sunxi_name_to_gpio() */
	241	#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
	242	#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
	243	#ifndef __ASSEMBLY__
	244	extern int soft_i2c_gpio_sda;
	245	extern int soft_i2c_gpio_scl;
	246	#endif
1fc42018 HG	247	#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
	248	#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
	249	#else
	250	#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
	251	#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089 HG	252	#endif
55410089 HG	253
14bc66bd HN	254	/* PMU */
	255	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| defined CONFIG_AXP221_POWER
	256	#define CONFIG_SPL_POWER_SUPPORT
	257	#endif
	258
f84269c5	259	#ifndef CONFIG_CONS_INDEX
cba69eee	260	#define CONFIG_CONS_INDEX 1 /* UART0 */
f84269c5	261	#endif
cba69eee	262
a5da3c83	263	#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962 HG	264	#if CONFIG_CONS_INDEX == 1
	265	#ifdef CONFIG_MACH_SUN9I
	266	#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
	267	#else
	268	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
	269	#endif
	270	#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
	271	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11 LI	272	#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
5cd83b11 LI	273	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962 HG	274	#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
	275	#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
	276	#else
	277	#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
	278	#endif
a5da3c83	279	#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962	280
abce2c62 IC	281	/* GPIO */
abce2c62 IC	282	#define CONFIG_SUNXI_GPIO
cd82113a	283	#define CONFIG_SPL_GPIO_SUPPORT
abce2c62 IC	284	#define CONFIG_CMD_GPIO
abce2c62 IC	285
7f2c521f LV	286	#ifdef CONFIG_VIDEO
7f2c521f LV	287	/*
5633a296 HG	288	* The amount of RAM to keep free at the top of RAM when relocating u-boot,
5633a296 HG	289	* to use as framebuffer. This must be a multiple of 4096.
7f2c521f	290	*/
5633a296	291	#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
7f2c521f	292
2d7a084b LV	293	/* Do we want to initialize a simple FB? */
	294	#define CONFIG_VIDEO_DT_SIMPLEFB
	295
7f2c521f LV	296	#define CONFIG_VIDEO_SUNXI
	297
	298	#define CONFIG_CFB_CONSOLE
	299	#define CONFIG_VIDEO_SW_CURSOR
	300	#define CONFIG_VIDEO_LOGO
be8ec633	301	#define CONFIG_VIDEO_STD_TIMINGS
75481607	302	#define CONFIG_I2C_EDID
7f2c521f LV	303
	304	/* allow both serial and cfb console. */
	305	#define CONFIG_CONSOLE_MUX
	306	/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
	307	#define CONFIG_VGA_AS_SINGLE_DEVICE
	308
2d7a084b LV	309	/* To be able to hook simplefb into dt */
	310	#ifdef CONFIG_VIDEO_DT_SIMPLEFB
	311	#define CONFIG_OF_BOARD_SETUP
	312	#endif
	313
7f2c521f LV	314	#endif /* CONFIG_VIDEO */
7f2c521f LV	315
c26fb9db HG	316	/* Ethernet support */
c26fb9db HG	317	#ifdef CONFIG_SUNXI_EMAC
8145dea4	318	#define CONFIG_PHY_ADDR 1
c26fb9db	319	#define CONFIG_MII /* MII PHY management */
8145dea4	320	#define CONFIG_PHYLIB
c26fb9db HG	321	#endif
c26fb9db HG	322
5835823d	323	#ifdef CONFIG_SUNXI_GMAC
5835823d IC	324	#define CONFIG_DW_AUTONEG
	325	#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
	326	#define CONFIG_PHY_ADDR 1
	327	#define CONFIG_MII /* MII PHY management */
	328	#define CONFIG_PHYLIB
	329	#endif
	330
2582ca0d	331	#ifdef CONFIG_USB_EHCI_HCD
6a72e804 HG	332	#define CONFIG_USB_OHCI_NEW
	333	#define CONFIG_USB_OHCI_SUNXI
	334	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c	335	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a HG	336	#endif
	337
	338	#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f	339	#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a HG	340	#endif
1a800f7a HG	341
b21144eb PK	342	#ifdef CONFIG_USB_MUSB_GADGET
	343	#define CONFIG_USB_GADGET
	344	#define CONFIG_USB_GADGET_DUALSPEED
	345	#define CONFIG_USB_GADGET_VBUS_DRAW 0
	346
	347	#define CONFIG_USB_GADGET_DOWNLOAD
	348	#define CONFIG_USB_FUNCTION_FASTBOOT
	349	#define CONFIG_USB_FUNCTION_MASS_STORAGE
	350	#endif
	351
	352	#ifdef CONFIG_USB_GADGET_DOWNLOAD
	353	#define CONFIG_G_DNL_VENDOR_NUM 0x1f3a
	354	#define CONFIG_G_DNL_PRODUCT_NUM 0x1010
	355	#define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology"
	356	#endif
	357
	358	#ifdef CONFIG_USB_FUNCTION_FASTBOOT
	359	#define CONFIG_CMD_FASTBOOT
	360	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	361	#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
	362
	363	#define CONFIG_FASTBOOT_FLASH
	364	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
	365	#define CONFIG_EFI_PARTITION
	366	#endif
	367
	368	#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
	369	#define CONFIG_CMD_USB_MASS_STORAGE
	370	#endif
	371
86b49093 HG	372	#ifdef CONFIG_USB_KEYBOARD
	373	#define CONFIG_CONSOLE_MUX
	374	#define CONFIG_PREBOOT
	375	#define CONFIG_SYS_STDIO_DEREGISTER
eab9433a	376	#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093 HG	377	#endif
86b49093 HG	378
cba69eee IC	379	#if !defined CONFIG_ENV_IS_IN_MMC && \
	380	!defined CONFIG_ENV_IS_IN_NAND && \
	381	!defined CONFIG_ENV_IS_IN_FAT && \
	382	!defined CONFIG_ENV_IS_IN_SPI_FLASH
	383	#define CONFIG_ENV_IS_NOWHERE
	384	#endif
	385
b41d7d05	386	#define CONFIG_MISC_INIT_R
7f2c521f	387	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
b41d7d05	388
cba69eee IC	389	#ifndef CONFIG_SPL_BUILD
cba69eee IC	390	#include <config_distro_defaults.h>
2ec3a612	391
a7925078 SS	392	/* Enable pre-console buffer to get complete log on the VGA console */
a7925078 SS	393	#define CONFIG_PRE_CONSOLE_BUFFER
a8552c7c	394	#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 8025 screens /
a7925078	395
8c95c556 HG	396	/*
	397	* 240M RAM (256M minimum minus space for the framebuffer),
	398	* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
	399	* 1M script, 1M pxe and the ramdisk at the end.
	400	*/
846e3254	401	#define MEM_LAYOUT_ENV_SETTINGS \
8c95c556	402	"bootm_size=0xf000000\0" \
e049fe28 HG	403	"kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
	404	"fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
	405	"scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
	406	"pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
	407	"ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
846e3254	408
41f8e9f5 CYT	409	#ifdef CONFIG_MMC
	410	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
	411	#else
	412	#define BOOT_TARGET_DEVICES_MMC(func)
	413	#endif
	414
2ec3a612 HG	415	#ifdef CONFIG_AHCI
	416	#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
	417	#else
	418	#define BOOT_TARGET_DEVICES_SCSI(func)
	419	#endif
	420
2582ca0d	421	#ifdef CONFIG_USB_STORAGE
859b3f14 CYT	422	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	423	#else
	424	#define BOOT_TARGET_DEVICES_USB(func)
	425	#endif
	426
2ec3a612	427	#define BOOT_TARGET_DEVICES(func) \
41f8e9f5	428	BOOT_TARGET_DEVICES_MMC(func) \
2ec3a612	429	BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14	430	BOOT_TARGET_DEVICES_USB(func) \
2ec3a612 HG	431	func(PXE, pxe, na) \
	432	func(DHCP, dhcp, na)
	433
	434	#include <config_distro_bootcmd.h>
	435
86b49093 HG	436	#ifdef CONFIG_USB_KEYBOARD
	437	#define CONSOLE_STDIN_SETTINGS \
	438	"preboot=usb start\0" \
	439	"stdin=serial,usbkbd\0"
	440	#else
7f2c521f LV	441	#define CONSOLE_STDIN_SETTINGS \
7f2c521f LV	442	"stdin=serial\0"
86b49093	443	#endif
7f2c521f LV	444
	445	#ifdef CONFIG_VIDEO
	446	#define CONSOLE_STDOUT_SETTINGS \
	447	"stdout=serial,vga\0" \
	448	"stderr=serial,vga\0"
	449	#else
	450	#define CONSOLE_STDOUT_SETTINGS \
	451	"stdout=serial\0" \
	452	"stderr=serial\0"
	453	#endif
	454
	455	#define CONSOLE_ENV_SETTINGS \
	456	CONSOLE_STDIN_SETTINGS \
	457	CONSOLE_STDOUT_SETTINGS
	458
2ec3a612	459	#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f	460	CONSOLE_ENV_SETTINGS \
846e3254	461	MEM_LAYOUT_ENV_SETTINGS \
25acd33f	462	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
846e3254	463	"console=ttyS0,115200\0" \
2ec3a612 HG	464	BOOTENV
	465
	466	#else /* ifndef CONFIG_SPL_BUILD */
	467	#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee IC	468	#endif
	469
	470	#endif /* _SUNXI_COMMON_CONFIG_H */