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cba69eee IC |
1 | /* |
2 | * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> | |
3 | * | |
4 | * (C) Copyright 2007-2011 | |
5 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> | |
6 | * Tom Cubie <tangliang@allwinnertech.com> | |
7 | * | |
8 | * Configuration settings for the Allwinner sunxi series of boards. | |
9 | * | |
10 | * SPDX-License-Identifier: GPL-2.0+ | |
11 | */ | |
12 | ||
13 | #ifndef _SUNXI_COMMON_CONFIG_H | |
14 | #define _SUNXI_COMMON_CONFIG_H | |
15 | ||
daf6d399 | 16 | #include <asm/arch/cpu.h> |
e049fe28 HG |
17 | #include <linux/stringify.h> |
18 | ||
77ef1369 SS |
19 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
20 | /* | |
21 | * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the | |
22 | * expense of restricting some features, so the regular machine id values can | |
23 | * be used. | |
24 | */ | |
25 | # define CONFIG_MACH_TYPE_COMPAT_REV 0 | |
26 | #else | |
27 | /* | |
28 | * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. | |
29 | * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass | |
30 | * beyond the machine id check. | |
31 | */ | |
32 | # define CONFIG_MACH_TYPE_COMPAT_REV 1 | |
33 | #endif | |
34 | ||
cba69eee IC |
35 | /* |
36 | * High Level Configuration Options | |
37 | */ | |
38 | #define CONFIG_SUNXI /* sunxi family */ | |
50827a59 | 39 | #ifdef CONFIG_SPL_BUILD |
50827a59 IC |
40 | #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ |
41 | #endif | |
cba69eee | 42 | |
cba69eee IC |
43 | /* Serial & console */ |
44 | #define CONFIG_SYS_NS16550 | |
45 | #define CONFIG_SYS_NS16550_SERIAL | |
46 | /* ns16550 reg in the low bits of cpu reg */ | |
cba69eee | 47 | #define CONFIG_SYS_NS16550_CLK 24000000 |
daf6d399 HG |
48 | #ifdef CONFIG_DM_SERIAL |
49 | # define CONFIG_DW_SERIAL | |
50 | #else | |
1a81cf83 SG |
51 | # define CONFIG_SYS_NS16550_REG_SIZE -4 |
52 | # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE | |
53 | # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE | |
54 | # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE | |
55 | # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE | |
56 | # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE | |
57 | #endif | |
cba69eee | 58 | |
8a65f69c | 59 | /* CPU */ |
daf6d399 | 60 | #define CONFIG_DISPLAY_CPUINFO |
8a65f69c PK |
61 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
62 | ||
e049fe28 HG |
63 | /* |
64 | * The DRAM Base differs between some models. We cannot use macros for the | |
65 | * CONFIG_FOO defines which contain the DRAM base address since they end | |
66 | * up unexpanded in include/autoconf.mk . | |
67 | * | |
68 | * So we have to have this #ifdef #else #endif block for these. | |
69 | */ | |
70 | #ifdef CONFIG_MACH_SUN9I | |
71 | #define SDRAM_OFFSET(x) 0x2##x | |
72 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
73 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ | |
74 | #define CONFIG_SYS_TEXT_BASE 0x2a000000 | |
75 | #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 | |
ff42d107 HG |
76 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
77 | * since it needs to fit in with the other values. By also #defining it | |
78 | * we get warnings if the Kconfig value mismatches. */ | |
79 | #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 | |
e049fe28 HG |
80 | #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 |
81 | #else | |
82 | #define SDRAM_OFFSET(x) 0x4##x | |
cba69eee | 83 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
e049fe28 HG |
84 | #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ |
85 | #define CONFIG_SYS_TEXT_BASE 0x4a000000 | |
86 | #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 | |
ff42d107 HG |
87 | /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here |
88 | * since it needs to fit in with the other values. By also #defining it | |
89 | * we get warnings if the Kconfig value mismatches. */ | |
90 | #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 | |
e049fe28 HG |
91 | #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 |
92 | #endif | |
93 | ||
94 | #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ | |
e049fe28 | 95 | |
77fe9887 HG |
96 | #ifdef CONFIG_MACH_SUN9I |
97 | /* | |
98 | * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is | |
99 | * slightly bigger. Note that it is possible to map the first 32 KiB of the | |
100 | * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the | |
101 | * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and | |
102 | * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. | |
103 | */ | |
104 | #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 | |
105 | #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ | |
106 | #else | |
cba69eee IC |
107 | #define CONFIG_SYS_INIT_RAM_ADDR 0x0 |
108 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ | |
77fe9887 | 109 | #endif |
cba69eee IC |
110 | |
111 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
112 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
113 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
114 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
115 | ||
116 | #define CONFIG_NR_DRAM_BANKS 1 | |
117 | #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE | |
118 | #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ | |
119 | ||
a6e50a88 IC |
120 | #ifdef CONFIG_AHCI |
121 | #define CONFIG_LIBATA | |
122 | #define CONFIG_SCSI_AHCI | |
123 | #define CONFIG_SCSI_AHCI_PLAT | |
124 | #define CONFIG_SUNXI_AHCI | |
0751b138 | 125 | #define CONFIG_SYS_64BIT_LBA |
a6e50a88 IC |
126 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
127 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
128 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
129 | CONFIG_SYS_SCSI_MAX_LUN) | |
130 | #define CONFIG_CMD_SCSI | |
131 | #endif | |
132 | ||
cba69eee IC |
133 | #define CONFIG_SETUP_MEMORY_TAGS |
134 | #define CONFIG_CMDLINE_TAG | |
135 | #define CONFIG_INITRD_TAG | |
9f852211 | 136 | #define CONFIG_SERIAL_TAG |
cba69eee | 137 | |
e5268616 | 138 | #ifdef CONFIG_NAND_SUNXI |
21d4d37a | 139 | #define CONFIG_SPL_NAND_SUPPORT 1 |
960caeba PZ |
140 | #endif |
141 | ||
e24ea55c | 142 | /* mmc config */ |
44c79879 | 143 | #ifdef CONFIG_MMC |
e24ea55c IC |
144 | #define CONFIG_GENERIC_MMC |
145 | #define CONFIG_CMD_MMC | |
146 | #define CONFIG_MMC_SUNXI | |
147 | #define CONFIG_MMC_SUNXI_SLOT 0 | |
e24ea55c IC |
148 | #define CONFIG_ENV_IS_IN_MMC |
149 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ | |
ff2b47f6 | 150 | #endif |
e24ea55c | 151 | |
5c965ed9 HG |
152 | /* 64MB of malloc() pool */ |
153 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) | |
cba69eee IC |
154 | |
155 | /* | |
156 | * Miscellaneous configurable options | |
157 | */ | |
06beadb0 IC |
158 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
159 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ | |
cba69eee | 160 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
cba69eee IC |
161 | |
162 | /* Boot Argument Buffer Size */ | |
163 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
164 | ||
cba69eee | 165 | /* standalone support */ |
e049fe28 | 166 | #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR |
cba69eee | 167 | |
cba69eee IC |
168 | /* baudrate */ |
169 | #define CONFIG_BAUDRATE 115200 | |
170 | ||
171 | /* The stack sizes are set up in start.S using the settings below */ | |
172 | #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ | |
173 | ||
174 | /* FLASH and environment organization */ | |
175 | ||
176 | #define CONFIG_SYS_NO_FLASH | |
177 | ||
fa5e1020 | 178 | #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ |
cba69eee IC |
179 | #define CONFIG_IDENT_STRING " Allwinner Technology" |
180 | ||
e24ea55c | 181 | #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ |
cba69eee IC |
182 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
183 | ||
cba69eee IC |
184 | #define CONFIG_FAT_WRITE /* enable write access */ |
185 | ||
186 | #define CONFIG_SPL_FRAMEWORK | |
187 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
188 | #define CONFIG_SPL_SERIAL_SUPPORT | |
189 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
190 | ||
942cb0b6 SG |
191 | #define CONFIG_SPL_BOARD_LOAD_IMAGE |
192 | ||
50827a59 IC |
193 | #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ |
194 | #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ | |
195 | ||
196 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
f0ce28e9 | 197 | |
44c79879 | 198 | #ifdef CONFIG_MMC |
50827a59 | 199 | #define CONFIG_SPL_MMC_SUPPORT |
f0ce28e9 | 200 | #endif |
50827a59 IC |
201 | |
202 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" | |
203 | ||
204 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ | |
205 | #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ | |
206 | ||
cba69eee IC |
207 | /* end of 32 KiB in sram */ |
208 | #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ | |
209 | #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK | |
cba69eee | 210 | |
6620377e | 211 | /* I2C */ |
ad40610b | 212 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER |
6620377e | 213 | #define CONFIG_SPL_I2C_SUPPORT |
ad40610b HG |
214 | #endif |
215 | ||
6c739c5d PK |
216 | #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ |
217 | defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ | |
218 | defined CONFIG_I2C4_ENABLE | |
8b2db32a | 219 | #define CONFIG_SYS_I2C |
6620377e HG |
220 | #define CONFIG_SYS_I2C_MVTWSI |
221 | #define CONFIG_SYS_I2C_SPEED 400000 | |
222 | #define CONFIG_SYS_I2C_SLAVE 0x7f | |
8b2db32a HG |
223 | #define CONFIG_CMD_I2C |
224 | #endif | |
55410089 HG |
225 | |
226 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) | |
227 | #define CONFIG_SYS_I2C_SOFT | |
228 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 | |
229 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 | |
55410089 HG |
230 | /* We use pin names in Kconfig and sunxi_name_to_gpio() */ |
231 | #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda | |
232 | #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl | |
233 | #ifndef __ASSEMBLY__ | |
234 | extern int soft_i2c_gpio_sda; | |
235 | extern int soft_i2c_gpio_scl; | |
236 | #endif | |
1fc42018 HG |
237 | #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ |
238 | #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ | |
239 | #else | |
240 | #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ | |
241 | #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ | |
55410089 HG |
242 | #endif |
243 | ||
14bc66bd HN |
244 | /* PMU */ |
245 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER | |
246 | #define CONFIG_SPL_POWER_SUPPORT | |
247 | #endif | |
248 | ||
f84269c5 | 249 | #ifndef CONFIG_CONS_INDEX |
cba69eee | 250 | #define CONFIG_CONS_INDEX 1 /* UART0 */ |
f84269c5 | 251 | #endif |
cba69eee | 252 | |
a5da3c83 | 253 | #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE |
f3133962 HG |
254 | #if CONFIG_CONS_INDEX == 1 |
255 | #ifdef CONFIG_MACH_SUN9I | |
256 | #define OF_STDOUT_PATH "/soc/serial@07000000:115200" | |
257 | #else | |
258 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" | |
259 | #endif | |
260 | #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) | |
261 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" | |
5cd83b11 LI |
262 | #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) |
263 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" | |
f3133962 HG |
264 | #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) |
265 | #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" | |
266 | #else | |
267 | #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. | |
268 | #endif | |
a5da3c83 | 269 | #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ |
f3133962 | 270 | |
abce2c62 IC |
271 | /* GPIO */ |
272 | #define CONFIG_SUNXI_GPIO | |
cd82113a | 273 | #define CONFIG_SPL_GPIO_SUPPORT |
abce2c62 | 274 | |
7f2c521f LV |
275 | #ifdef CONFIG_VIDEO |
276 | /* | |
5633a296 HG |
277 | * The amount of RAM to keep free at the top of RAM when relocating u-boot, |
278 | * to use as framebuffer. This must be a multiple of 4096. | |
7f2c521f | 279 | */ |
5c965ed9 | 280 | #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) |
7f2c521f | 281 | |
2d7a084b LV |
282 | /* Do we want to initialize a simple FB? */ |
283 | #define CONFIG_VIDEO_DT_SIMPLEFB | |
284 | ||
7f2c521f LV |
285 | #define CONFIG_VIDEO_SUNXI |
286 | ||
287 | #define CONFIG_CFB_CONSOLE | |
288 | #define CONFIG_VIDEO_SW_CURSOR | |
289 | #define CONFIG_VIDEO_LOGO | |
be8ec633 | 290 | #define CONFIG_VIDEO_STD_TIMINGS |
75481607 | 291 | #define CONFIG_I2C_EDID |
58332f89 | 292 | #define VIDEO_LINE_LEN (pGD->plnSizeX) |
7f2c521f LV |
293 | |
294 | /* allow both serial and cfb console. */ | |
295 | #define CONFIG_CONSOLE_MUX | |
296 | /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ | |
297 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
298 | ||
2d7a084b LV |
299 | /* To be able to hook simplefb into dt */ |
300 | #ifdef CONFIG_VIDEO_DT_SIMPLEFB | |
301 | #define CONFIG_OF_BOARD_SETUP | |
302 | #endif | |
303 | ||
7f2c521f LV |
304 | #endif /* CONFIG_VIDEO */ |
305 | ||
c26fb9db HG |
306 | /* Ethernet support */ |
307 | #ifdef CONFIG_SUNXI_EMAC | |
8145dea4 | 308 | #define CONFIG_PHY_ADDR 1 |
c26fb9db | 309 | #define CONFIG_MII /* MII PHY management */ |
8145dea4 | 310 | #define CONFIG_PHYLIB |
c26fb9db HG |
311 | #endif |
312 | ||
5835823d | 313 | #ifdef CONFIG_SUNXI_GMAC |
5835823d IC |
314 | #define CONFIG_DW_AUTONEG |
315 | #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ | |
316 | #define CONFIG_PHY_ADDR 1 | |
317 | #define CONFIG_MII /* MII PHY management */ | |
318 | #define CONFIG_PHYLIB | |
319 | #endif | |
320 | ||
2582ca0d | 321 | #ifdef CONFIG_USB_EHCI_HCD |
6a72e804 HG |
322 | #define CONFIG_USB_OHCI_NEW |
323 | #define CONFIG_USB_OHCI_SUNXI | |
324 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 | |
3584f30c | 325 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 |
1a800f7a HG |
326 | #endif |
327 | ||
328 | #ifdef CONFIG_USB_MUSB_SUNXI | |
95de1e2f | 329 | #define CONFIG_USB_MUSB_PIO_ONLY |
1a800f7a HG |
330 | #endif |
331 | ||
b21144eb PK |
332 | #ifdef CONFIG_USB_MUSB_GADGET |
333 | #define CONFIG_USB_GADGET | |
334 | #define CONFIG_USB_GADGET_DUALSPEED | |
335 | #define CONFIG_USB_GADGET_VBUS_DRAW 0 | |
336 | ||
337 | #define CONFIG_USB_GADGET_DOWNLOAD | |
338 | #define CONFIG_USB_FUNCTION_FASTBOOT | |
339 | #define CONFIG_USB_FUNCTION_MASS_STORAGE | |
340 | #endif | |
341 | ||
342 | #ifdef CONFIG_USB_GADGET_DOWNLOAD | |
343 | #define CONFIG_G_DNL_VENDOR_NUM 0x1f3a | |
344 | #define CONFIG_G_DNL_PRODUCT_NUM 0x1010 | |
345 | #define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology" | |
346 | #endif | |
347 | ||
348 | #ifdef CONFIG_USB_FUNCTION_FASTBOOT | |
349 | #define CONFIG_CMD_FASTBOOT | |
350 | #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR | |
351 | #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 | |
bac83fb0 | 352 | #define CONFIG_ANDROID_BOOT_IMAGE |
b21144eb PK |
353 | |
354 | #define CONFIG_FASTBOOT_FLASH | |
44c79879 MR |
355 | |
356 | #ifdef CONFIG_MMC | |
b21144eb PK |
357 | #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 |
358 | #define CONFIG_EFI_PARTITION | |
359 | #endif | |
44c79879 | 360 | #endif |
b21144eb PK |
361 | |
362 | #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE | |
363 | #define CONFIG_CMD_USB_MASS_STORAGE | |
364 | #endif | |
365 | ||
86b49093 HG |
366 | #ifdef CONFIG_USB_KEYBOARD |
367 | #define CONFIG_CONSOLE_MUX | |
368 | #define CONFIG_PREBOOT | |
369 | #define CONFIG_SYS_STDIO_DEREGISTER | |
eab9433a | 370 | #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE |
86b49093 HG |
371 | #endif |
372 | ||
cba69eee IC |
373 | #if !defined CONFIG_ENV_IS_IN_MMC && \ |
374 | !defined CONFIG_ENV_IS_IN_NAND && \ | |
375 | !defined CONFIG_ENV_IS_IN_FAT && \ | |
376 | !defined CONFIG_ENV_IS_IN_SPI_FLASH | |
377 | #define CONFIG_ENV_IS_NOWHERE | |
378 | #endif | |
379 | ||
b41d7d05 | 380 | #define CONFIG_MISC_INIT_R |
7f2c521f | 381 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
b41d7d05 | 382 | |
cba69eee IC |
383 | #ifndef CONFIG_SPL_BUILD |
384 | #include <config_distro_defaults.h> | |
2ec3a612 | 385 | |
a7925078 SS |
386 | /* Enable pre-console buffer to get complete log on the VGA console */ |
387 | #define CONFIG_PRE_CONSOLE_BUFFER | |
a8552c7c | 388 | #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ |
a7925078 | 389 | |
8c95c556 | 390 | /* |
5c965ed9 | 391 | * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. |
8c95c556 HG |
392 | * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, |
393 | * 1M script, 1M pxe and the ramdisk at the end. | |
394 | */ | |
846e3254 | 395 | #define MEM_LAYOUT_ENV_SETTINGS \ |
5c965ed9 | 396 | "bootm_size=0xa000000\0" \ |
e049fe28 HG |
397 | "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ |
398 | "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ | |
399 | "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ | |
400 | "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ | |
401 | "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" | |
846e3254 | 402 | |
41f8e9f5 CYT |
403 | #ifdef CONFIG_MMC |
404 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) | |
405 | #else | |
406 | #define BOOT_TARGET_DEVICES_MMC(func) | |
407 | #endif | |
408 | ||
2ec3a612 HG |
409 | #ifdef CONFIG_AHCI |
410 | #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) | |
411 | #else | |
412 | #define BOOT_TARGET_DEVICES_SCSI(func) | |
413 | #endif | |
414 | ||
2582ca0d | 415 | #ifdef CONFIG_USB_STORAGE |
859b3f14 CYT |
416 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
417 | #else | |
418 | #define BOOT_TARGET_DEVICES_USB(func) | |
419 | #endif | |
420 | ||
f3b589c0 BN |
421 | /* FEL boot support, auto-execute boot.scr if a script address was provided */ |
422 | #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ | |
423 | "bootcmd_fel=" \ | |
424 | "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ | |
425 | "echo '(FEL boot)'; " \ | |
426 | "source ${fel_scriptaddr}; " \ | |
427 | "fi\0" | |
428 | #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ | |
429 | "fel " | |
430 | ||
2ec3a612 | 431 | #define BOOT_TARGET_DEVICES(func) \ |
f3b589c0 | 432 | func(FEL, fel, na) \ |
41f8e9f5 | 433 | BOOT_TARGET_DEVICES_MMC(func) \ |
2ec3a612 | 434 | BOOT_TARGET_DEVICES_SCSI(func) \ |
859b3f14 | 435 | BOOT_TARGET_DEVICES_USB(func) \ |
2ec3a612 HG |
436 | func(PXE, pxe, na) \ |
437 | func(DHCP, dhcp, na) | |
438 | ||
3b824025 HG |
439 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
440 | #define BOOTCMD_SUNXI_COMPAT \ | |
441 | "bootcmd_sunxi_compat=" \ | |
442 | "setenv root /dev/mmcblk0p3 rootwait; " \ | |
443 | "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ | |
444 | "echo Loaded environment from uEnv.txt; " \ | |
445 | "env import -t 0x44000000 ${filesize}; " \ | |
446 | "fi; " \ | |
447 | "setenv bootargs console=${console} root=${root} ${extraargs}; " \ | |
448 | "ext2load mmc 0 0x43000000 script.bin && " \ | |
449 | "ext2load mmc 0 0x48000000 uImage && " \ | |
450 | "bootm 0x48000000\0" | |
451 | #else | |
452 | #define BOOTCMD_SUNXI_COMPAT | |
453 | #endif | |
454 | ||
2ec3a612 HG |
455 | #include <config_distro_bootcmd.h> |
456 | ||
86b49093 HG |
457 | #ifdef CONFIG_USB_KEYBOARD |
458 | #define CONSOLE_STDIN_SETTINGS \ | |
459 | "preboot=usb start\0" \ | |
460 | "stdin=serial,usbkbd\0" | |
461 | #else | |
7f2c521f LV |
462 | #define CONSOLE_STDIN_SETTINGS \ |
463 | "stdin=serial\0" | |
86b49093 | 464 | #endif |
7f2c521f LV |
465 | |
466 | #ifdef CONFIG_VIDEO | |
467 | #define CONSOLE_STDOUT_SETTINGS \ | |
468 | "stdout=serial,vga\0" \ | |
469 | "stderr=serial,vga\0" | |
470 | #else | |
471 | #define CONSOLE_STDOUT_SETTINGS \ | |
472 | "stdout=serial\0" \ | |
473 | "stderr=serial\0" | |
474 | #endif | |
475 | ||
476 | #define CONSOLE_ENV_SETTINGS \ | |
477 | CONSOLE_STDIN_SETTINGS \ | |
478 | CONSOLE_STDOUT_SETTINGS | |
479 | ||
2ec3a612 | 480 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
7f2c521f | 481 | CONSOLE_ENV_SETTINGS \ |
846e3254 | 482 | MEM_LAYOUT_ENV_SETTINGS \ |
25acd33f | 483 | "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
846e3254 | 484 | "console=ttyS0,115200\0" \ |
3b824025 | 485 | BOOTCMD_SUNXI_COMPAT \ |
2ec3a612 HG |
486 | BOOTENV |
487 | ||
488 | #else /* ifndef CONFIG_SPL_BUILD */ | |
489 | #define CONFIG_EXTRA_ENV_SETTINGS | |
cba69eee IC |
490 | #endif |
491 | ||
492 | #endif /* _SUNXI_COMMON_CONFIG_H */ |