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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
cba69eee IC |
2 | /* |
3 | * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> | |
4 | * | |
5 | * (C) Copyright 2007-2011 | |
6 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> | |
7 | * Tom Cubie <tangliang@allwinnertech.com> | |
8 | * | |
9 | * Configuration settings for the Allwinner sunxi series of boards. | |
cba69eee IC |
10 | */ |
11 | ||
12 | #ifndef _SUNXI_COMMON_CONFIG_H | |
13 | #define _SUNXI_COMMON_CONFIG_H | |
14 | ||
daf6d399 | 15 | #include <asm/arch/cpu.h> |
e049fe28 HG |
16 | #include <linux/stringify.h> |
17 | ||
cba69eee | 18 | /* Serial & console */ |
cba69eee IC |
19 | #define CONFIG_SYS_NS16550_SERIAL |
20 | /* ns16550 reg in the low bits of cpu reg */ | |
2c699fe0 IZ |
21 | #ifdef CONFIG_MACH_SUNIV |
22 | /* suniv doesn't have apb2 and uart is connected to apb1 */ | |
23 | #define CONFIG_SYS_NS16550_CLK 100000000 | |
24 | #else | |
cba69eee | 25 | #define CONFIG_SYS_NS16550_CLK 24000000 |
2c699fe0 | 26 | #endif |
4fb60552 | 27 | #ifndef CONFIG_DM_SERIAL |
1a81cf83 SG |
28 | # define CONFIG_SYS_NS16550_REG_SIZE -4 |
29 | # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE | |
30 | # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE | |
31 | # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE | |
32 | # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE | |
33 | # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE | |
34 | #endif | |
cba69eee | 35 | |
8a65f69c | 36 | /* CPU */ |
8a65f69c | 37 | |
e049fe28 HG |
38 | /* |
39 | * The DRAM Base differs between some models. We cannot use macros for the | |
40 | * CONFIG_FOO defines which contain the DRAM base address since they end | |
41 | * up unexpanded in include/autoconf.mk . | |
42 | * | |
43 | * So we have to have this #ifdef #else #endif block for these. | |
44 | */ | |
45 | #ifdef CONFIG_MACH_SUN9I | |
46 | #define SDRAM_OFFSET(x) 0x2##x | |
47 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
2c699fe0 IZ |
48 | #elif defined(CONFIG_MACH_SUNIV) |
49 | #define SDRAM_OFFSET(x) 0x8##x | |
50 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 | |
e049fe28 HG |
51 | #else |
52 | #define SDRAM_OFFSET(x) 0x4##x | |
cba69eee | 53 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
c199489f | 54 | /* V3s do not have enough memory to place code at 0x4a000000 */ |
e049fe28 HG |
55 | #endif |
56 | ||
77fe9887 HG |
57 | /* |
58 | * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is | |
59 | * slightly bigger. Note that it is possible to map the first 32 KiB of the | |
60 | * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the | |
61 | * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and | |
62 | * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. | |
cadc7c20 IZ |
63 | * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register |
64 | * is known yet. | |
65 | * H6 has SRAM A1 at 0x00020000. | |
77fe9887 | 66 | */ |
cadc7c20 IZ |
67 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS |
68 | /* FIXME: this may be larger on some SoCs */ | |
69 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ | |
cba69eee | 70 | |
cba69eee IC |
71 | #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE |
72 | #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ | |
73 | ||
e5268616 | 74 | #ifdef CONFIG_NAND_SUNXI |
a0dfa88b | 75 | #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 |
960caeba PZ |
76 | #endif |
77 | ||
cba69eee IC |
78 | /* |
79 | * Miscellaneous configurable options | |
80 | */ | |
cba69eee | 81 | |
cba69eee | 82 | /* standalone support */ |
e049fe28 | 83 | #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR |
cba69eee | 84 | |
cba69eee IC |
85 | /* FLASH and environment organization */ |
86 | ||
cadc7c20 IZ |
87 | /* |
88 | * We cannot use expressions here, because expressions won't be evaluated in | |
89 | * autoconf.mk. | |
90 | */ | |
91 | #if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000 | |
54522c92 AP |
92 | #ifdef CONFIG_ARM64 |
93 | /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ | |
94 | #define LOW_LEVEL_SRAM_STACK 0x00054000 | |
95 | #else | |
bc613d85 | 96 | #define LOW_LEVEL_SRAM_STACK 0x00018000 |
54522c92 | 97 | #endif /* !CONFIG_ARM64 */ |
e5715e71 | 98 | #elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000 |
8ec293e0 | 99 | #ifdef CONFIG_MACH_SUN50I_H616 |
8ec293e0 JS |
100 | #define LOW_LEVEL_SRAM_STACK 0x58000 |
101 | #else | |
e5715e71 IZ |
102 | /* end of SRAM A2 on H6 for now */ |
103 | #define LOW_LEVEL_SRAM_STACK 0x00118000 | |
8ec293e0 | 104 | #endif |
d96ebc46 | 105 | #else |
bc613d85 | 106 | #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ |
d96ebc46 | 107 | #endif |
50827a59 | 108 | |
c26fb9db | 109 | /* Ethernet support */ |
c26fb9db | 110 | |
671f9ad8 AP |
111 | #ifdef CONFIG_ARM64 |
112 | /* | |
113 | * Boards seem to come with at least 512MB of DRAM. | |
114 | * The kernel should go at 512K, which is the default text offset (that will | |
115 | * be adjusted at runtime if needed). | |
116 | * There is no compression for arm64 kernels (yet), so leave some space | |
117 | * for really big kernels, say 256MB for now. | |
118 | * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. | |
671f9ad8 | 119 | */ |
17d6ecea JS |
120 | #define BOOTM_SIZE __stringify(0xa000000) |
121 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) | |
747c2421 AF |
122 | #define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000)) |
123 | #define KERNEL_COMP_SIZE __stringify(0xb000000) | |
17d6ecea JS |
124 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) |
125 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) | |
126 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) | |
127 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) | |
128 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000)) | |
671f9ad8 | 129 | |
1bf98bd4 AP |
130 | #elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 256) |
131 | /* | |
132 | * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. | |
133 | * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, | |
134 | * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. | |
135 | */ | |
136 | #define BOOTM_SIZE __stringify(0xa000000) | |
137 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) | |
138 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) | |
139 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) | |
140 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) | |
141 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000)) | |
142 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000)) | |
143 | ||
144 | #elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 64) | |
2c699fe0 IZ |
145 | /* |
146 | * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. | |
147 | * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, | |
148 | * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. | |
149 | */ | |
150 | #define BOOTM_SIZE __stringify(0x2e00000) | |
151 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) | |
152 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) | |
153 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) | |
154 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) | |
155 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) | |
156 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000)) | |
157 | ||
1bf98bd4 | 158 | #elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 32) |
2c699fe0 | 159 | /* |
c8b9ba4b AP |
160 | * 32M RAM minus 2.5MB for u-boot, heap, stack, etc. |
161 | * 16M uncompressed kernel, 7M compressed kernel, 128K fdt, 64K script, | |
162 | * 128K DT overlay, 128K PXE and the ramdisk in the rest (max. 5MB) | |
2c699fe0 IZ |
163 | */ |
164 | #define BOOTM_SIZE __stringify(0x1700000) | |
c8b9ba4b AP |
165 | #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) |
166 | #define FDT_ADDR_R __stringify(SDRAM_OFFSET(1d50000)) | |
167 | #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1d40000)) | |
168 | #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1d00000)) | |
169 | #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1d20000)) | |
170 | #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1800000)) | |
2c699fe0 | 171 | |
671f9ad8 | 172 | #else |
1bf98bd4 | 173 | #error Need at least 32MB of DRAM. Please adjust load addresses. |
671f9ad8 | 174 | #endif |
2a909c5f | 175 | |
846e3254 | 176 | #define MEM_LAYOUT_ENV_SETTINGS \ |
c199489f | 177 | "bootm_size=" BOOTM_SIZE "\0" \ |
2a909c5f SS |
178 | "kernel_addr_r=" KERNEL_ADDR_R "\0" \ |
179 | "fdt_addr_r=" FDT_ADDR_R "\0" \ | |
180 | "scriptaddr=" SCRIPT_ADDR_R "\0" \ | |
181 | "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ | |
17d6ecea | 182 | "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \ |
2a909c5f SS |
183 | "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" |
184 | ||
747c2421 AF |
185 | #ifdef CONFIG_ARM64 |
186 | ||
187 | #define MEM_LAYOUT_ENV_EXTRA_SETTINGS \ | |
188 | "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \ | |
189 | "kernel_comp_size=" KERNEL_COMP_SIZE "\0" | |
190 | ||
191 | #else | |
192 | ||
193 | #define MEM_LAYOUT_ENV_EXTRA_SETTINGS "" | |
194 | ||
195 | #endif | |
196 | ||
2a909c5f SS |
197 | #define DFU_ALT_INFO_RAM \ |
198 | "dfu_alt_info_ram=" \ | |
199 | "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ | |
200 | "fdt ram " FDT_ADDR_R " 0x100000;" \ | |
201 | "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" | |
846e3254 | 202 | |
41f8e9f5 | 203 | #ifdef CONFIG_MMC |
5a37a400 | 204 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
de86fc38 MR |
205 | #define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \ |
206 | BOOTENV_DEV_MMC(MMC, mmc, 0) \ | |
207 | BOOTENV_DEV_MMC(MMC, mmc, 1) \ | |
208 | "bootcmd_mmc_auto=" \ | |
209 | "if test ${mmc_bootdev} -eq 1; then " \ | |
210 | "run bootcmd_mmc1; " \ | |
211 | "run bootcmd_mmc0; " \ | |
212 | "elif test ${mmc_bootdev} -eq 0; then " \ | |
213 | "run bootcmd_mmc0; " \ | |
214 | "run bootcmd_mmc1; " \ | |
215 | "fi\0" | |
216 | ||
217 | #define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \ | |
218 | "mmc_auto " | |
219 | ||
220 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na) | |
5a37a400 | 221 | #else |
de86fc38 | 222 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) |
5a37a400 | 223 | #endif |
41f8e9f5 CYT |
224 | #else |
225 | #define BOOT_TARGET_DEVICES_MMC(func) | |
226 | #endif | |
227 | ||
2ec3a612 HG |
228 | #ifdef CONFIG_AHCI |
229 | #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) | |
230 | #else | |
231 | #define BOOT_TARGET_DEVICES_SCSI(func) | |
232 | #endif | |
233 | ||
2582ca0d | 234 | #ifdef CONFIG_USB_STORAGE |
859b3f14 CYT |
235 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
236 | #else | |
237 | #define BOOT_TARGET_DEVICES_USB(func) | |
238 | #endif | |
239 | ||
0eabec14 OJ |
240 | #ifdef CONFIG_CMD_PXE |
241 | #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) | |
242 | #else | |
243 | #define BOOT_TARGET_DEVICES_PXE(func) | |
244 | #endif | |
245 | ||
246 | #ifdef CONFIG_CMD_DHCP | |
247 | #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) | |
248 | #else | |
249 | #define BOOT_TARGET_DEVICES_DHCP(func) | |
250 | #endif | |
251 | ||
f3b589c0 BN |
252 | /* FEL boot support, auto-execute boot.scr if a script address was provided */ |
253 | #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ | |
254 | "bootcmd_fel=" \ | |
255 | "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ | |
256 | "echo '(FEL boot)'; " \ | |
257 | "source ${fel_scriptaddr}; " \ | |
258 | "fi\0" | |
259 | #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ | |
260 | "fel " | |
261 | ||
2ec3a612 | 262 | #define BOOT_TARGET_DEVICES(func) \ |
f3b589c0 | 263 | func(FEL, fel, na) \ |
41f8e9f5 | 264 | BOOT_TARGET_DEVICES_MMC(func) \ |
2ec3a612 | 265 | BOOT_TARGET_DEVICES_SCSI(func) \ |
859b3f14 | 266 | BOOT_TARGET_DEVICES_USB(func) \ |
0eabec14 OJ |
267 | BOOT_TARGET_DEVICES_PXE(func) \ |
268 | BOOT_TARGET_DEVICES_DHCP(func) | |
2ec3a612 | 269 | |
3b824025 HG |
270 | #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT |
271 | #define BOOTCMD_SUNXI_COMPAT \ | |
272 | "bootcmd_sunxi_compat=" \ | |
273 | "setenv root /dev/mmcblk0p3 rootwait; " \ | |
274 | "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ | |
275 | "echo Loaded environment from uEnv.txt; " \ | |
276 | "env import -t 0x44000000 ${filesize}; " \ | |
277 | "fi; " \ | |
278 | "setenv bootargs console=${console} root=${root} ${extraargs}; " \ | |
279 | "ext2load mmc 0 0x43000000 script.bin && " \ | |
280 | "ext2load mmc 0 0x48000000 uImage && " \ | |
281 | "bootm 0x48000000\0" | |
282 | #else | |
283 | #define BOOTCMD_SUNXI_COMPAT | |
284 | #endif | |
285 | ||
2ec3a612 HG |
286 | #include <config_distro_bootcmd.h> |
287 | ||
86b49093 HG |
288 | #ifdef CONFIG_USB_KEYBOARD |
289 | #define CONSOLE_STDIN_SETTINGS \ | |
86b49093 HG |
290 | "stdin=serial,usbkbd\0" |
291 | #else | |
7f2c521f LV |
292 | #define CONSOLE_STDIN_SETTINGS \ |
293 | "stdin=serial\0" | |
86b49093 | 294 | #endif |
7f2c521f | 295 | |
b86986c7 | 296 | #ifdef CONFIG_VIDEO |
56009451 JS |
297 | #define CONSOLE_STDOUT_SETTINGS \ |
298 | "stdout=serial,vidconsole\0" \ | |
299 | "stderr=serial,vidconsole\0" | |
7f2c521f LV |
300 | #else |
301 | #define CONSOLE_STDOUT_SETTINGS \ | |
302 | "stdout=serial\0" \ | |
303 | "stderr=serial\0" | |
304 | #endif | |
305 | ||
c53654fc MR |
306 | #define PARTS_DEFAULT \ |
307 | "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \ | |
308 | "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \ | |
309 | "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \ | |
310 | "name=system,size=-,uuid=${uuid_gpt_system};" | |
311 | ||
312 | #define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b" | |
313 | ||
314 | #ifdef CONFIG_ARM64 | |
315 | #define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae" | |
316 | #else | |
317 | #define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3" | |
318 | #endif | |
319 | ||
7f2c521f LV |
320 | #define CONSOLE_ENV_SETTINGS \ |
321 | CONSOLE_STDIN_SETTINGS \ | |
322 | CONSOLE_STDOUT_SETTINGS | |
323 | ||
2eff3b71 AF |
324 | #ifdef CONFIG_ARM64 |
325 | #define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" | |
326 | #else | |
327 | #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" | |
328 | #endif | |
329 | ||
2ec3a612 | 330 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
7f2c521f | 331 | CONSOLE_ENV_SETTINGS \ |
846e3254 | 332 | MEM_LAYOUT_ENV_SETTINGS \ |
747c2421 | 333 | MEM_LAYOUT_ENV_EXTRA_SETTINGS \ |
2a909c5f | 334 | DFU_ALT_INFO_RAM \ |
2eff3b71 | 335 | "fdtfile=" FDTFILE "\0" \ |
846e3254 | 336 | "console=ttyS0,115200\0" \ |
c53654fc MR |
337 | "uuid_gpt_esp=" UUID_GPT_ESP "\0" \ |
338 | "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \ | |
339 | "partitions=" PARTS_DEFAULT "\0" \ | |
3b824025 | 340 | BOOTCMD_SUNXI_COMPAT \ |
2ec3a612 HG |
341 | BOOTENV |
342 | ||
cba69eee | 343 | #endif /* _SUNXI_COMMON_CONFIG_H */ |