[u-boot.git] / include / configs / taurus.h

/*
 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
 * (C) Copyright 2013 Siemens AG
 *
 * Based on:
 * U-Boot file: include/configs/at91sam9260ek.h
 *
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>
#include <linux/sizes.h>


#if defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
#endif
/*
 * Warning: changing CONFIG_SYS_TEXT_BASE requires
 * adapting the initial boot program.
 * Since the linker has to swallow that define, we must use a pure
 * hex number here!
 */


#define CONFIG_SYS_TEXT_BASE		0x21000000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */

/* Misc CPU related */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_CMD_BOOTZ

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

#define CONFIG_BOOTDELAY	3

/*
 * Command line configuration.
 */
#define CONFIG_CMD_NAND

/*
 * SDRAM: 1 bank, min 32, max 128 MB
 * Initialized before u-boot gets started.
 */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
#endif

/* NOR flash - no real flash on this board */
#define CONFIG_SYS_NO_FLASH			1

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_AT91_WANTS_COMMON_PHY

#define CONFIG_AT91SAM9_WATCHDOG
#define CONFIG_AT91_HW_WDT_TIMEOUT	15
#if !defined(CONFIG_SPL_BUILD)
/* Enable the watchdog */
#define CONFIG_HW_WATCHDOG
#endif

/* USB */
#if defined(CONFIG_BOARD_TAURUS)
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE

/* USB DFU support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS

#define CONFIG_USB_GADGET_AT91

/* DFU class support */
#define CONFIG_CMD_DFU
#define CONFIG_USB_FUNCTION_DFU
#define CONFIG_DFU_NAND
#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
#define DFU_MANIFEST_POLL_TIMEOUT	25000

#define CONFIG_SYS_CACHELINE_SIZE	SZ_8K
#endif

/* SPI EEPROM */
#define CONFIG_SPI
#define CONFIG_ATMEL_SPI
#define TAURUS_SPI_MASK (1 << 4)
#define TAURUS_SPI_CS_PIN	AT91_PIN_PA3

#if defined(CONFIG_SPL_BUILD)
/* SPL related */
#undef CONFIG_SPL_OS_BOOT		/* Not supported by existing map */
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000

#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_SPEED 1000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
#endif

/* load address */
#define CONFIG_SYS_LOAD_ADDR			0x22000000

/* bootstrap in spi flash , u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0x100000
#define CONFIG_ENV_OFFSET_REDUND	0x180000
#define CONFIG_ENV_SIZE		(SZ_128K)	/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"

#if defined(CONFIG_BOARD_TAURUS)
#define	CONFIG_BOOTARGS_TAURUS						\
	"console=ttyS0,115200 earlyprintk "				\
	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
	"256k(env),256k(env_redundant),256k(spare),"			\
	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
	"root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif

#if defined(CONFIG_BOARD_AXM)
#define CONFIG_BOOTARGS_AXM						\
	"\0"	\
	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:"	\
	"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0"		\
	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0"		\
	"baudrate=115200\0"						\
	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0"	\
	"boot_retries=0\0"						\
	"bootcmd=run flash_self\0"					\
	"bootdelay=3\0"							\
	"ethact=macb0\0"						\
	"flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
	"bootm ${kernel_ram};reset\0"					\
	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
	"bootm ${kernel_ram};reset\0"					\
	"flash_self_test=run nand_kernel;run setbootargs addtest; "	\
	"upgrade_available;bootm ${kernel_ram};reset\0"			\
	"hostname=systemone\0"						\
	"kernel_Off=0x00200000\0"					\
	"kernel_Off_fallback=0x03800000\0"				\
	"kernel_ram=0x21500000\0"					\
	"kernel_size=0x00400000\0"					\
	"kernel_size_fallback=0x00400000\0"				\
	"loads_echo=1\0"						\
	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} "		\
		"${kernel_size}\0"					\
	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};"		\
	"run nfsargs;run addip;upgrade_available;bootm "		\
		"${kernel_ram};reset\0"					\
	"netdev=eth0\0"							\
	"nfsargs=run root_path;setenv bootargs ${bootargs} "		\
	"root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "		\
	"at91sam9_wdt.wdt_timeout=16\0"					\
	"partitionset_active=A\0"					\
	"preboot=echo;echo Type 'run flash_self' to use kernel and root "\
	"filesystem on memory;echo Type 'run flash_nfs' to use kernel "	\
	"from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
	"to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
	"project_dir=systemone\0"					\
	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
	"rootfs=/dev/mtdblock5\0"					\
	"rootfs_fallback=/dev/mtdblock7\0"				\
	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
		"root=${rootfs} rootfstype=jffs2 panic=7 "		\
		"at91sam9_wdt.wdt_timeout=16\0"				\
	"stderr=serial\0"						\
	"stdin=serial\0"						\
	"stdout=serial\0"						\
	"upgrade_available=0\0"
#endif

#if defined(CONFIG_BOARD_TAURUS)
#define CONFIG_BOOTARGS		CONFIG_BOOTARGS_TAURUS
#endif

#if defined(CONFIG_BOARD_AXM)
#define CONFIG_BOOTARGS		CONFIG_BOOTARGS_AXM
#endif

#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE \
	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN \
	ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)

/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x0
#define CONFIG_SPL_MAX_SIZE		(31 * SZ_512)
#define	CONFIG_SPL_STACK		(ATMEL_BASE_SRAM1 + SZ_16K)
#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
					CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN

#define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
#define CONFIG_SPL_BSS_MAX_SIZE		(3 * SZ_512)

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT

#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_USE_NANDFLASH	1
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
#define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
#define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_5_ADDR_CYCLE

#define CONFIG_SYS_NAND_SIZE		(256 * SZ_1M)
#define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
#define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCSIZE		256
#define CONFIG_SYS_NAND_ECCBYTES	3
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
					  48, 49, 50, 51, 52, 53, 54, 55, \
					  56, 57, 58, 59, 60, 61, 62, 63, }


#define CONFIG_SPL_ATMEL_SIZE
#define CONFIG_SYS_MASTER_CLOCK		132096000
#define AT91_PLL_LOCK_TIMEOUT		1000000
#define CONFIG_SYS_AT91_PLLA		0x202A3F01
#define CONFIG_SYS_MCKR			0x1300
#define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
#define CONFIG_SYS_AT91_PLLB		0x10193F05

#endif
Commit	Line	Data
0f8bc283 HS	1	/*
	2	* Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
	3	* (C) Copyright 2013 Siemens AG
	4	*
	5	* Based on:
	6	* U-Boot file: include/configs/at91sam9260ek.h
	7	*
	8	* (C) Copyright 2007-2008
	9	* Stelian Pop <stelian@popies.net>
	10	* Lead Tech Design <www.leadtechdesign.com>
	11	*
	12	* SPDX-License-Identifier: GPL-2.0+
	13	*/
	14
	15	#ifndef __CONFIG_H
	16	#define __CONFIG_H
	17
	18	/*
	19	* SoC must be defined first, before hardware.h is included.
	20	* In this case SoC is defined in boards.cfg.
	21	*/
	22	#include <asm/hardware.h>
40540823	23	#include <linux/sizes.h>
0f8bc283	24
d0b37230	25
389aee89 HS	26	#if defined(CONFIG_SPL_BUILD)
	27	#define CONFIG_SYS_THUMB_BUILD
	28	#define CONFIG_SYS_ICACHE_OFF
	29	#define CONFIG_SYS_DCACHE_OFF
	30	#endif
0f8bc283 HS	31	/*
	32	* Warning: changing CONFIG_SYS_TEXT_BASE requires
	33	* adapting the initial boot program.
	34	* Since the linker has to swallow that define, we must use a pure
	35	* hex number here!
	36	*/
	37
	38
237e3793	39	#define CONFIG_SYS_TEXT_BASE 0x21000000
0f8bc283 HS	40
	41	/* ARM asynchronous clock */
	42	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
	43	#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
0f8bc283 HS	44
	45	/* Misc CPU related */
	46	#define CONFIG_ARCH_CPU_INIT
	47	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	48	#define CONFIG_SETUP_MEMORY_TAGS
	49	#define CONFIG_INITRD_TAG
	50	#define CONFIG_SKIP_LOWLEVEL_INIT
	51	#define CONFIG_BOARD_EARLY_INIT_F
	52	#define CONFIG_DISPLAY_CPUINFO
	53
	54	#define CONFIG_CMD_BOOTZ
0f8bc283 HS	55
	56	/* general purpose I/O */
	57	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	58	#define CONFIG_AT91_GPIO
	59	#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
	60
	61	/* serial console */
	62	#define CONFIG_ATMEL_USART
	63	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	64	#define CONFIG_USART_ID ATMEL_ID_SYS
	65	#define CONFIG_BAUDRATE 115200
	66
	67	#define CONFIG_BOOTDELAY 3
	68
	69	/*
	70	* Command line configuration.
	71	*/
0f8bc283 HS	72	#define CONFIG_CMD_NAND
	73
	74	/*
	75	* SDRAM: 1 bank, min 32, max 128 MB
	76	* Initialized before u-boot gets started.
	77	*/
	78	#define CONFIG_NR_DRAM_BANKS 1
	79	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
0ed366ff	80	#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
0f8bc283 HS	81
	82	/*
	83	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	84	* leaving the correct space for initial global data structure above
	85	* that address while providing maximum stack area below.
	86	*/
0ed366ff	87	#define CONFIG_SYS_INIT_SP_ADDR \
0f8bc283 HS	88	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
	89
	90	/* NAND flash */
	91	#ifdef CONFIG_CMD_NAND
	92	#define CONFIG_NAND_ATMEL
	93	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	94	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
	95	#define CONFIG_SYS_NAND_DBW_8
	96	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	97	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	98	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	99	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
	100	#endif
	101
	102	/* NOR flash - no real flash on this board */
	103	#define CONFIG_SYS_NO_FLASH 1
	104
	105	/* Ethernet */
	106	#define CONFIG_MACB
	107	#define CONFIG_RMII
	108	#define CONFIG_AT91_WANTS_COMMON_PHY
	109
f624162f	110	#define CONFIG_AT91SAM9_WATCHDOG
0ed366ff	111	#define CONFIG_AT91_HW_WDT_TIMEOUT 15
f624162f HS	112	#if !defined(CONFIG_SPL_BUILD)
	113	/* Enable the watchdog */
	114	#define CONFIG_HW_WATCHDOG
	115	#endif
	116
0f8bc283 HS	117	/* USB */
	118	#if defined(CONFIG_BOARD_TAURUS)
	119	#define CONFIG_USB_ATMEL
e8b81eef	120	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
0f8bc283 HS	121	#define CONFIG_USB_OHCI_NEW
	122	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	123	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
	124	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
	125	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
	126	#define CONFIG_USB_STORAGE
e8b81eef HS	127
	128	/* USB DFU support */
	129	#define CONFIG_CMD_MTDPARTS
	130	#define CONFIG_MTD_DEVICE
	131	#define CONFIG_MTD_PARTITIONS
	132
e8b81eef HS	133	#define CONFIG_USB_GADGET_AT91
	134
	135	/* DFU class support */
e8b81eef HS	136	#define CONFIG_CMD_DFU
	137	#define CONFIG_USB_FUNCTION_DFU
	138	#define CONFIG_DFU_NAND
e8b81eef HS	139	#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
	140	#define DFU_MANIFEST_POLL_TIMEOUT 25000
	141
e8b81eef	142	#define CONFIG_SYS_CACHELINE_SIZE SZ_8K
0f8bc283 HS	143	#endif
0f8bc283 HS	144
50921cdc HS	145	/* SPI EEPROM */
50921cdc HS	146	#define CONFIG_SPI
50921cdc	147	#define CONFIG_ATMEL_SPI
50921cdc HS	148	#define TAURUS_SPI_MASK (1 << 4)
	149	#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
	150
a1655bb2 HS	151	#if defined(CONFIG_SPL_BUILD)
	152	/* SPL related */
	153	#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
	154	#define CONFIG_SPL_SPI_SUPPORT
	155	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	156	#define CONFIG_SPL_SPI_LOAD
	157	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
	158
	159	#define CONFIG_SF_DEFAULT_BUS 0
0ed366ff HS	160	#define CONFIG_SF_DEFAULT_SPEED 1000000
0ed366ff HS	161	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
a1655bb2 HS	162	#endif
a1655bb2 HS	163
0f8bc283 HS	164	/* load address */
	165	#define CONFIG_SYS_LOAD_ADDR 0x22000000
	166
	167	/* bootstrap in spi flash , u-boot + env + linux in nandflash */
	168	#define CONFIG_ENV_IS_IN_NAND
	169	#define CONFIG_ENV_OFFSET 0x100000
	170	#define CONFIG_ENV_OFFSET_REDUND 0x180000
0ed366ff	171	#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
0f8bc283	172	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
40540823 HS	173
	174	#if defined(CONFIG_BOARD_TAURUS)
	175	#define CONFIG_BOOTARGS_TAURUS \
0f8bc283 HS	176	"console=ttyS0,115200 earlyprintk " \
	177	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
	178	"256k(env),256k(env_redundant),256k(spare)," \
	179	"512k(dtb),6M(kernel)ro,-(rootfs) " \
	180	"root=/dev/mtdblock7 rw rootfstype=jffs2"
40540823 HS	181	#endif
	182
	183	#if defined(CONFIG_BOARD_AXM)
	184	#define CONFIG_BOOTARGS_AXM \
	185	"\0" \
	186	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
	187	"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
	188	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
	189	"baudrate=115200\0" \
	190	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
	191	"boot_retries=0\0" \
	192	"bootcmd=run flash_self\0" \
	193	"bootdelay=3\0" \
	194	"ethact=macb0\0" \
	195	"flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
	196	"bootm ${kernel_ram};reset\0" \
	197	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
	198	"bootm ${kernel_ram};reset\0" \
	199	"flash_self_test=run nand_kernel;run setbootargs addtest; " \
	200	"upgrade_available;bootm ${kernel_ram};reset\0" \
	201	"hostname=systemone\0" \
	202	"kernel_Off=0x00200000\0" \
	203	"kernel_Off_fallback=0x03800000\0" \
	204	"kernel_ram=0x21500000\0" \
	205	"kernel_size=0x00400000\0" \
	206	"kernel_size_fallback=0x00400000\0" \
	207	"loads_echo=1\0" \
	208	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
	209	"${kernel_size}\0" \
	210	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
	211	"run nfsargs;run addip;upgrade_available;bootm " \
	212	"${kernel_ram};reset\0" \
	213	"netdev=eth0\0" \
	214	"nfsargs=run root_path;setenv bootargs ${bootargs} " \
	215	"root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
	216	"at91sam9_wdt.wdt_timeout=16\0" \
	217	"partitionset_active=A\0" \
	218	"preboot=echo;echo Type 'run flash_self' to use kernel and root "\
	219	"filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
	220	"from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
	221	"to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
	222	"project_dir=systemone\0" \
	223	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
	224	"rootfs=/dev/mtdblock5\0" \
	225	"rootfs_fallback=/dev/mtdblock7\0" \
	226	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
	227	"root=${rootfs} rootfstype=jffs2 panic=7 " \
	228	"at91sam9_wdt.wdt_timeout=16\0" \
	229	"stderr=serial\0" \
	230	"stdin=serial\0" \
	231	"stdout=serial\0" \
	232	"upgrade_available=0\0"
	233	#endif
	234
	235	#if defined(CONFIG_BOARD_TAURUS)
	236	#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
	237	#endif
	238
	239	#if defined(CONFIG_BOARD_AXM)
	240	#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
	241	#endif
0f8bc283	242
0f8bc283 HS	243	#define CONFIG_SYS_CBSIZE 256
	244	#define CONFIG_SYS_MAXARGS 16
	245	#define CONFIG_SYS_PBSIZE \
	246	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	247	#define CONFIG_SYS_LONGHELP
	248	#define CONFIG_CMDLINE_EDITING
	249	#define CONFIG_AUTO_COMPLETE
	250
	251	/*
	252	* Size of malloc() pool
	253	*/
	254	#define CONFIG_SYS_MALLOC_LEN \
e8b81eef	255	ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
0f8bc283	256
237e3793 HS	257	/* Defines for SPL */
	258	#define CONFIG_SPL_FRAMEWORK
	259	#define CONFIG_SPL_TEXT_BASE 0x0
40540823 HS	260	#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
40540823 HS	261	#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
a1655bb2 HS	262	#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
	263	CONFIG_SYS_MALLOC_LEN)
	264	#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
237e3793 HS	265
237e3793 HS	266	#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
0ed366ff	267	#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
237e3793 HS	268
	269	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	270	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	271	#define CONFIG_SPL_SERIAL_SUPPORT
	272
	273	#define CONFIG_SPL_BOARD_INIT
	274	#define CONFIG_SPL_GPIO_SUPPORT
	275	#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
	276	#define CONFIG_SPL_NAND_SUPPORT
	277	#define CONFIG_SYS_USE_NANDFLASH 1
	278	#define CONFIG_SPL_NAND_DRIVERS
	279	#define CONFIG_SPL_NAND_BASE
	280	#define CONFIG_SPL_NAND_ECC
	281	#define CONFIG_SPL_NAND_RAW_ONLY
	282	#define CONFIG_SPL_NAND_SOFTECC
	283	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
e8b81eef	284	#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
237e3793 HS	285	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	286	#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
	287	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	288
0ed366ff HS	289	#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
	290	#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
	291	#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
237e3793 HS	292	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	293	CONFIG_SYS_NAND_PAGE_SIZE)
	294	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	295	#define CONFIG_SYS_NAND_ECCSIZE 256
	296	#define CONFIG_SYS_NAND_ECCBYTES 3
	297	#define CONFIG_SYS_NAND_OOBSIZE 64
	298	#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
	299	48, 49, 50, 51, 52, 53, 54, 55, \
	300	56, 57, 58, 59, 60, 61, 62, 63, }
	301
	302
	303	#define CONFIG_SPL_ATMEL_SIZE
	304	#define CONFIG_SYS_MASTER_CLOCK 132096000
	305	#define AT91_PLL_LOCK_TIMEOUT 1000000
	306	#define CONFIG_SYS_AT91_PLLA 0x202A3F01
	307	#define CONFIG_SYS_MCKR 0x1300
	308	#define CONFIG_SYS_MCKR_CSS (0x02 \| CONFIG_SYS_MCKR)
	309	#define CONFIG_SYS_AT91_PLLB 0x10193F05
40540823	310
0f8bc283	311	#endif