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1/*
2 * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3 *
4 * Configuration settings for the TBS2910 MatrixARM board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __TBS2910_CONFIG_H
10#define __TBS2910_CONFIG_H
11
12#include "mx6_common.h"
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13
14/* General configuration */
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15
16#define CONFIG_MACH_TYPE 3980
17
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18#define CONFIG_SYS_HZ 1000
19
1368f993 20#define CONFIG_IMX_THERMAL
fbd18aa6 21
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22/* Physical Memory Map */
23#define CONFIG_NR_DRAM_BANKS 1
24#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
25
26#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
27#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
28#define CONFIG_SYS_INIT_SP_OFFSET \
29 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
30#define CONFIG_SYS_INIT_SP_ADDR \
31 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
32
33#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
34
35#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
36#define CONFIG_SYS_MEMTEST_END \
37 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
38
29138c6f 39#define CONFIG_SYS_BOOTMAPSZ 0x10000000
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40
41/* Serial console */
42#define CONFIG_MXC_UART
43#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
05d492a3 44
05d492a3 45#define CONFIG_CONS_INDEX 1
b31fb4b9 46
05d492a3 47/* *** Command definition *** */
05d492a3 48#define CONFIG_CMD_BMODE
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49
50/* Filesystems / image support */
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51
52/* MMC */
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53#define CONFIG_SYS_FSL_USDHC_NUM 3
54#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
9927d60f 55#define CONFIG_SUPPORT_EMMC_BOOT
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56
57/* Ethernet */
58#define CONFIG_FEC_MXC
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59#define CONFIG_FEC_MXC
60#define CONFIG_MII
61#define IMX_FEC_BASE ENET_BASE_ADDR
62#define CONFIG_FEC_XCV_TYPE RGMII
63#define CONFIG_ETHPRIME "FEC"
64#define CONFIG_FEC_MXC_PHYADDR 4
65#define CONFIG_PHYLIB
66#define CONFIG_PHY_ATHEROS
67
68/* Framebuffer */
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69#ifdef CONFIG_VIDEO
70#define CONFIG_VIDEO_IPUV3
71#define CONFIG_IPUV3_CLK 260000000
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72#define CONFIG_VIDEO_BMP_RLE8
73#define CONFIG_IMX_HDMI
74#define CONFIG_IMX_VIDEO_SKIP
75#define CONFIG_CMD_HDMIDETECT
76#endif
77
78/* PCI */
79#define CONFIG_CMD_PCI
80#ifdef CONFIG_CMD_PCI
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81#define CONFIG_PCI_SCAN_SHOW
82#define CONFIG_PCIE_IMX
83#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
84#endif
85
86/* SATA */
87#define CONFIG_CMD_SATA
88#ifdef CONFIG_CMD_SATA
89#define CONFIG_DWC_AHSATA
90#define CONFIG_SYS_SATA_MAX_DEVICE 1
91#define CONFIG_DWC_AHSATA_PORT_ID 0
92#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
93#define CONFIG_LBA48
94#define CONFIG_LIBATA
95#endif
96
97/* USB */
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98#ifdef CONFIG_CMD_USB
99#define CONFIG_USB_EHCI
100#define CONFIG_USB_EHCI_MX6
101#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
d896276d 102#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
05d492a3 103#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
6628aa57 104#ifdef CONFIG_CMD_USB_MASS_STORAGE
6628aa57 105#define CONFIG_USBD_HS
01acd6ab 106#define CONFIG_USB_FUNCTION_MASS_STORAGE
6628aa57 107#endif /* CONFIG_CMD_USB_MASS_STORAGE */
05d492a3 108#ifdef CONFIG_USB_KEYBOARD
daa12e3f 109#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
54ca183a 110#define CONFIG_PREBOOT \
8741a374 111 "usb start; " \
54ca183a 112 "if hdmidet; then " \
8741a374 113 "run set_con_hdmi; " \
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114 "else " \
115 "run set_con_serial; " \
116 "fi;"
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117#endif /* CONFIG_USB_KEYBOARD */
118#endif /* CONFIG_CMD_USB */
119
120/* RTC */
121#define CONFIG_CMD_DATE
122#ifdef CONFIG_CMD_DATE
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123#define CONFIG_RTC_DS1307
124#define CONFIG_SYS_RTC_BUS_NUM 2
125#endif
126
127/* I2C */
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128#ifdef CONFIG_CMD_I2C
129#define CONFIG_SYS_I2C
130#define CONFIG_SYS_I2C_MXC
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131#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
132#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e 133#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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134#define CONFIG_SYS_I2C_SPEED 100000
135#define CONFIG_I2C_EDID
136#endif
137
056845c2 138/* Environment organization */
05d492a3 139#define CONFIG_ENV_IS_IN_MMC
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140#define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */
141#define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */
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142#define CONFIG_ENV_SIZE (8 * 1024)
143#define CONFIG_ENV_OFFSET (384 * 1024)
144#define CONFIG_ENV_OVERWRITE
145
146#define CONFIG_EXTRA_ENV_SETTINGS \
147 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
148 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
149 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
150 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
151 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
152 "${bootargs_mmc3}\0" \
153 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
154 "rdinit=/sbin/init enable_wait_mode=off\0" \
155 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
b9a16099 156 "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
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157 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
158 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
159 "run bootargs_upd; " \
160 "bootm 0x10800000 0x10d00000\0" \
161 "console=ttymxc0\0" \
162 "fan=gpio set 92\0" \
8741a374 163 "set_con_serial=setenv stdout serial; " \
54ca183a 164 "setenv stderr serial;\0" \
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165 "set_con_hdmi=setenv stdout serial,vga; " \
166 "setenv stderr serial,vga;\0" \
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167 "stderr=serial,vga;\0" \
168 "stdin=serial,usbkbd;\0" \
169 "stdout=serial,vga;\0"
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170
171#define CONFIG_BOOTCOMMAND \
172 "mmc rescan; " \
173 "if run bootcmd_up1; then " \
174 "run bootcmd_up2; " \
175 "else " \
176 "run bootcmd_mmc; " \
177 "fi"
178
179#endif /* __TBS2910_CONFIG_H * */