[people/ms/u-boot.git] / include / configs / tcm-bf537.h

/*
 * U-boot - Configuration file for TCM-BF537 board
 */

#ifndef __CONFIG_TCM_BF537_H__
#define __CONFIG_TCM_BF537_H__

#include <asm/config-pre.h>


/*
 * Processor Settings
 */
#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS


/*
 * Clock Settings
 *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
 *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
 */
/* CONFIG_CLKIN_HZ is any value in Hz					*/
#define CONFIG_CLKIN_HZ			25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
/*                                                1 = CLKIN / 2		*/
#define CONFIG_CLKIN_HALF		0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
/*                                                1 = bypass PLL	*/
#define CONFIG_PLL_BYPASS		0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
/* Values can range from 0-63 (where 0 means 64)			*/
#define CONFIG_VCO_MULT			21
/* CCLK_DIV controls the core clock divider				*/
/* Values can be 1, 2, 4, or 8 ONLY					*/
#define CONFIG_CCLK_DIV			1
/* SCLK_DIV controls the system clock divider				*/
/* Values can range from 1-15						*/
#define CONFIG_SCLK_DIV			4

/* Decrease core voltage */
#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)


/*
 * Memory Settings
 */
#define CONFIG_MEM_ADD_WDTH	9
#define CONFIG_MEM_SIZE		32

#define CONFIG_EBIU_SDRRC_VAL	0x3f8
#define CONFIG_EBIU_SDGCTL_VAL	0x9111cd

#define CONFIG_EBIU_AMGCTL_VAL	(AMBEN_ALL)
#define CONFIG_EBIU_AMBCTL0_VAL	(B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
#define CONFIG_EBIU_AMBCTL1_VAL	(B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)

#define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
#define CONFIG_SYS_MALLOC_LEN	(128 * 1024)


/*
 * Network Settings
 */
/* TCM-BF537E has no PHY on it, but EXT-BF5xx-USB/Ethernet board has */
#ifndef __ADSPBF534__
#define ADI_CMDS_NETWORK	1
#define CONFIG_BFIN_MAC
#define CONFIG_NETCONSOLE	1
#define CONFIG_NET_MULTI	1
#endif
#define CONFIG_HOSTNAME		tcm-bf537
/* Uncomment next line to use fixed MAC address */
/* #define CONFIG_ETHADDR	02:80:ad:20:31:e8 */


/*
 * Flash Settings
 */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
#define CONFIG_SYS_FLASH_BASE		0x20000000
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	67


/*
 * Env Storage Settings
 */
#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_OFFSET	0x4000
#define CONFIG_ENV_SIZE		0x2000
#define CONFIG_ENV_SECT_SIZE	0x20000
#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
#define ENV_IS_EMBEDDED
#else
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
 * the sector before the environment sector. If it throws
 * an error during compilation remove an object here to get
 * it linked after the configuration sector.
 */
# define LDS_BOARD_TEXT \
	arch/blackfin/cpu/traps.o		(.text .text.*); \
	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
	arch/blackfin/cpu/serial.o		(.text .text.*); \
	common/dlmalloc.o		(.text .text.*); \
	lib/crc32.o		(.text .text.*); \
	. = DEFINED(env_offset) ? env_offset : .; \
	common/env_embedded.o		(.text .text.*);
#endif


/*
 * I2C Settings
 */
#define CONFIG_BFIN_TWI_I2C	1
#define CONFIG_HARD_I2C		1


/*
 * Misc Settings
 */
#define CONFIG_BAUDRATE		115200
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE	0
#define CONFIG_BOOTCOMMAND	"run flashboot"
#define FLASHBOOT_ENV_SETTINGS \
	"flashboot=flread 20040000 1000000 280000;" \
	"bootm 0x1000000\0"


/*
 * Pull in common ADI header for remaining command/environment setup
 */
#include <configs/bfin_adi_common.h>


#endif
Commit	Line	Data
9417d9a2 MF	1	/*
	2	* U-boot - Configuration file for TCM-BF537 board
	3	*/
	4
	5	#ifndef __CONFIG_TCM_BF537_H__
	6	#define __CONFIG_TCM_BF537_H__
	7
f348ab85	8	#include <asm/config-pre.h>
9417d9a2 MF	9
	10
	11	/*
	12	* Processor Settings
	13	*/
9417d9a2 MF	14	#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
	15
	16
	17	/*
	18	* Clock Settings
	19	* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
	20	* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
	21	*/
	22	/* CONFIG_CLKIN_HZ is any value in Hz */
	23	#define CONFIG_CLKIN_HZ 25000000
	24	/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
	25	/* 1 = CLKIN / 2 */
	26	#define CONFIG_CLKIN_HALF 0
	27	/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
	28	/* 1 = bypass PLL */
	29	#define CONFIG_PLL_BYPASS 0
	30	/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
	31	/* Values can range from 0-63 (where 0 means 64) */
	32	#define CONFIG_VCO_MULT 21
	33	/* CCLK_DIV controls the core clock divider */
	34	/* Values can be 1, 2, 4, or 8 ONLY */
	35	#define CONFIG_CCLK_DIV 1
	36	/* SCLK_DIV controls the system clock divider */
	37	/* Values can range from 1-15 */
	38	#define CONFIG_SCLK_DIV 4
	39
fd04a05b HK	40	/* Decrease core voltage */
	41	#define CONFIG_VR_CTL_VAL (VLEV_115 \| CLKBUFOE \| GAIN_20 \| FREQ_1000)
	42
9417d9a2 MF	43
	44	/*
	45	* Memory Settings
	46	*/
	47	#define CONFIG_MEM_ADD_WDTH 9
	48	#define CONFIG_MEM_SIZE 32
	49
	50	#define CONFIG_EBIU_SDRRC_VAL 0x3f8
	51	#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
	52
	53	#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
	54	#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 \| B1RAT_11 \| B1HT_2 \| B1ST_3 \| B0WAT_7 \| B0RAT_11 \| B0HT_2 \| B0ST_3)
	55	#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 \| B3RAT_11 \| B3HT_2 \| B3ST_3 \| B2WAT_7 \| B2RAT_11 \| B2HT_2 \| B2ST_3)
	56
	57	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
	58	#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
	59
	60
	61	/*
	62	* Network Settings
	63	*/
	64	/* TCM-BF537E has no PHY on it, but EXT-BF5xx-USB/Ethernet board has */
	65	#ifndef __ADSPBF534__
	66	#define ADI_CMDS_NETWORK 1
	67	#define CONFIG_BFIN_MAC
	68	#define CONFIG_NETCONSOLE 1
	69	#define CONFIG_NET_MULTI 1
	70	#endif
	71	#define CONFIG_HOSTNAME tcm-bf537
	72	/* Uncomment next line to use fixed MAC address */
	73	/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
	74
	75
	76	/*
	77	* Flash Settings
	78	*/
	79	#define CONFIG_FLASH_CFI_DRIVER
	80	#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
	81	#define CONFIG_SYS_FLASH_BASE 0x20000000
	82	#define CONFIG_SYS_FLASH_CFI
	83	#define CONFIG_SYS_FLASH_PROTECTION
	84	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	85	#define CONFIG_SYS_MAX_FLASH_SECT 67
	86
	87
	88	/*
	89	* Env Storage Settings
	90	*/
	91	#define CONFIG_ENV_IS_IN_FLASH 1
	92	#define CONFIG_ENV_OFFSET 0x4000
	93	#define CONFIG_ENV_SIZE 0x2000
	94	#define CONFIG_ENV_SECT_SIZE 0x20000
	95	#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
	96	#define ENV_IS_EMBEDDED
	97	#else
76d82187	98	#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
9417d9a2	99	#endif
9ff67e5e MF	100	#ifdef ENV_IS_EMBEDDED
	101	/* WARNING - the following is hand-optimized to fit within
	102	* the sector before the environment sector. If it throws
	103	* an error during compilation remove an object here to get
	104	* it linked after the configuration sector.
	105	*/
	106	# define LDS_BOARD_TEXT \
c6fb83d2 PT	107	arch/blackfin/cpu/traps.o (.text .text.*); \
	108	arch/blackfin/cpu/interrupt.o (.text .text.*); \
	109	arch/blackfin/cpu/serial.o (.text .text.*); \
9ff67e5e	110	common/dlmalloc.o (.text .text.*); \
78acc472	111	lib/crc32.o (.text .text.*); \
9ff67e5e MF	112	. = DEFINED(env_offset) ? env_offset : .; \
	113	common/env_embedded.o (.text .text.*);
	114	#endif
9417d9a2 MF	115
	116
	117	/*
	118	* I2C Settings
	119	*/
	120	#define CONFIG_BFIN_TWI_I2C 1
	121	#define CONFIG_HARD_I2C 1
9417d9a2 MF	122
	123
	124	/*
	125	* Misc Settings
	126	*/
	127	#define CONFIG_BAUDRATE 115200
	128	#define CONFIG_MISC_INIT_R
	129	#define CONFIG_RTC_BFIN
	130	#define CONFIG_UART_CONSOLE 0
fd04a05b HK	131	#define CONFIG_BOOTCOMMAND "run flashboot"
	132	#define FLASHBOOT_ENV_SETTINGS \
	133	"flashboot=flread 20040000 1000000 280000;" \
	134	"bootm 0x1000000\0"
9417d9a2 MF	135
	136
	137	/*
	138	* Pull in common ADI header for remaining command/environment setup
	139	*/
	140	#include <configs/bfin_adi_common.h>
	141
9417d9a2 MF	142
9417d9a2 MF	143	#endif