[people/ms/u-boot.git] / include / configs / titanium.h

/*
 * Copyright (C) 2013 Stefan Roese <sr@denx.de>
 *
 * Configuration settings for the ProjectionDesign / Barco
 * Titanium board.
 *
 * Based on mx6qsabrelite.h which is:
 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "mx6_common.h"

#define CONFIG_MX6Q

/* Provide the MACH_TYPE value that the vendor kernel requires. */
#define CONFIG_MACH_TYPE		3769

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)

#define CONFIG_MISC_INIT_R

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_USDHC_NUM	1

#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_FEC_MXC_PHYADDR		4
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021

/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_MXC_USB_PORT	1
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

#define CONFIG_SYS_MEMTEST_START	0x10000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (500 << 20))

#define CONFIG_HOSTNAME			titanium
#define CONFIG_UBI_PART			ubi
#define CONFIG_UBIFS_VOLUME		rootfs0

#define MTDIDS_DEFAULT		"nand0=gpmi-nand"
#define MTDPARTS_DEFAULT	"mtdparts=gpmi-nand:16M(uboot),512k(env1)," \
				"512k(env2),-(ubi)"

#define CONFIG_EXTRA_ENV_SETTINGS \
	"kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
	"kernel_fs=/boot/uImage\0"					\
	"kernel_addr=11000000\0"					\
	"dtb=" __stringify(CONFIG_HOSTNAME) "/"				\
		__stringify(CONFIG_HOSTNAME) ".dtb\0"			\
	"dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0"		\
	"dtb_addr=12800000\0"						\
	"script=boot.scr\0" \
	"uimage=uImage\0" \
	"console=ttymxc0\0" \
	"baudrate=115200\0" \
	"fdt_high=0xffffffff\0"	  \
	"initrd_high=0xffffffff\0" \
	"mmcdev=0\0" \
	"mmcpart=1\0" \
	"uimage=uImage\0" \
	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
		" ${script}\0" \
	"bootscript=echo Running bootscript from mmc ...; source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"mmcroot=/dev/mmcblk0p2\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot} rootwait rw\0" \
	"bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
		" ${uimage}; bootm\0" \
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addcon=setenv bootargs ${bootargs} console=ttymxc0,"		\
		"${baudrate}\0"						\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0"	\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0"		\
	"part=" __stringify(CONFIG_UBI_PART) "\0"			\
	"boot_vol=0\0"							\
	"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"			\
	"load_ubifs=tftp ${kernel_addr} ${ubifs}\0"			\
	"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}"	\
		" ${filesize}\0"					\
	"upd_ubifs=run load_ubifs update_ubifs\0"			\
	"init_ubi=nand erase.part ubi;ubi part ${part};"		\
		"ubi create ${vol} c800000\0"				\
	"mtdids=" MTDIDS_DEFAULT "\0"					\
	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"		\
		" addcon addmtd;"					\
		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
	"ubifsargs=set bootargs ubi.mtd=ubi "				\
		"root=ubi:rootfs${boot_vol} rootfstype=ubifs\0"		\
	"ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0"	\
	"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"		\
		"ubifsload ${dtb_addr} ${dtb_fs};\0"			\
	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon "	\
		"addmtd;bootm ${kernel_addr} - ${dtb_addr}\0"		\
	"load_kernel=tftp ${kernel_addr} ${kernel}\0"			\
	"load_dtb=tftp ${dtb_addr} ${dtb}\0"				\
	"net_nfs=run load_dtb load_kernel; "				\
		"run nfsargs addip addcon addmtd;"			\
		"bootm ${kernel_addr} - ${dtb_addr}\0"			\
	"delenv=env default -a -f; saveenv; reset\0"

#define CONFIG_BOOTCOMMAND		"run nand_ubifs"

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					 sizeof(CONFIG_SYS_PROMPT) + 16)

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			(512 << 20)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS

#ifdef CONFIG_CMD_NAND

/* NAND stuff */
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION

/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8

/* Environment in NAND */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		(16 << 20)
#define CONFIG_ENV_SECT_SIZE		(128 << 10)
#define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + (512 << 10))
#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE

#else /* CONFIG_CMD_NAND */

/* Environment in MMC */
#define CONFIG_ENV_SIZE			(8 << 10)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0

#endif /* CONFIG_CMD_NAND */

/* UBI/UBIFS config options */
#define CONFIG_LZO
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_UBIFS

#endif			       /* __CONFIG_H */
Commit	Line	Data
b29ca4a1 SR	1	/*
	2	* Copyright (C) 2013 Stefan Roese <sr@denx.de>
	3	*
	4	* Configuration settings for the ProjectionDesign / Barco
	5	* Titanium board.
	6	*
	7	* Based on mx6qsabrelite.h which is:
	8	* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
	9	*
1a459660	10	* SPDX-License-Identifier: GPL-2.0+
b29ca4a1 SR	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
02824dc7	16	#include "mx6_common.h"
b29ca4a1	17
b29ca4a1	18	#define CONFIG_MX6Q
b29ca4a1	19
cd7b6344 TR	20	/* Provide the MACH_TYPE value that the vendor kernel requires. */
cd7b6344 TR	21	#define CONFIG_MACH_TYPE 3769
b29ca4a1	22
b29ca4a1 SR	23	/* Size of malloc() pool */
	24	#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
	25
b29ca4a1	26	#define CONFIG_MISC_INIT_R
b29ca4a1 SR	27
	28	#define CONFIG_MXC_UART
	29	#define CONFIG_MXC_UART_BASE UART1_BASE
	30
	31	/* I2C Configs */
b089d039	32	#define CONFIG_SYS_I2C
b089d039	33	#define CONFIG_SYS_I2C_MXC
03544c66 AA	34	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	35	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	36	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
b29ca4a1 SR	37	#define CONFIG_SYS_I2C_SPEED 100000
	38
	39	/* MMC Configs */
b29ca4a1 SR	40	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	41	#define CONFIG_SYS_FSL_USDHC_NUM 1
	42
b29ca4a1 SR	43	#define CONFIG_FEC_MXC
	44	#define CONFIG_MII
	45	#define IMX_FEC_BASE ENET_BASE_ADDR
	46	#define CONFIG_FEC_XCV_TYPE RGMII
	47	#define CONFIG_FEC_MXC_PHYADDR 4
	48	#define CONFIG_PHYLIB
	49	#define CONFIG_PHY_MICREL
	50	#define CONFIG_PHY_MICREL_KSZ9021
	51
	52	/* USB Configs */
b29ca4a1 SR	53	#define CONFIG_USB_EHCI
b29ca4a1 SR	54	#define CONFIG_USB_EHCI_MX6
b29ca4a1 SR	55	#define CONFIG_MXC_USB_PORT 1
	56	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	57	#define CONFIG_MXC_USB_FLAGS 0
	58
b29ca4a1 SR	59	#define CONFIG_SYS_MEMTEST_START 0x10000000
	60	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
	61
	62	#define CONFIG_HOSTNAME titanium
	63	#define CONFIG_UBI_PART ubi
	64	#define CONFIG_UBIFS_VOLUME rootfs0
	65
	66	#define MTDIDS_DEFAULT "nand0=gpmi-nand"
	67	#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \
	68	"512k(env2),-(ubi)"
	69
	70	#define CONFIG_EXTRA_ENV_SETTINGS \
	71	"kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
	72	"kernel_fs=/boot/uImage\0" \
	73	"kernel_addr=11000000\0" \
	74	"dtb=" __stringify(CONFIG_HOSTNAME) "/" \
	75	__stringify(CONFIG_HOSTNAME) ".dtb\0" \
	76	"dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \
	77	"dtb_addr=12800000\0" \
	78	"script=boot.scr\0" \
	79	"uimage=uImage\0" \
	80	"console=ttymxc0\0" \
	81	"baudrate=115200\0" \
	82	"fdt_high=0xffffffff\0" \
	83	"initrd_high=0xffffffff\0" \
	84	"mmcdev=0\0" \
	85	"mmcpart=1\0" \
	86	"uimage=uImage\0" \
	87	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
	88	" ${script}\0" \
	89	"bootscript=echo Running bootscript from mmc ...; source\0" \
	90	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	91	"mmcroot=/dev/mmcblk0p2\0" \
	92	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	93	"root=${mmcroot} rootwait rw\0" \
	94	"bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
	95	" ${uimage}; bootm\0" \
	96	"addip=setenv bootargs ${bootargs} " \
	97	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	98	":${hostname}:${netdev}:off panic=1\0" \
	99	"addcon=setenv bootargs ${bootargs} console=ttymxc0," \
	100	"${baudrate}\0" \
	101	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	102	"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \
	103	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	104	"nfsroot=${serverip}:${rootpath}\0" \
	105	"ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \
	106	"part=" __stringify(CONFIG_UBI_PART) "\0" \
	107	"boot_vol=0\0" \
	108	"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \
	109	"load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \
	110	"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
	111	" ${filesize}\0" \
	112	"upd_ubifs=run load_ubifs update_ubifs\0" \
	113	"init_ubi=nand erase.part ubi;ubi part ${part};" \
	114	"ubi create ${vol} c800000\0" \
	115	"mtdids=" MTDIDS_DEFAULT "\0" \
	116	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	117	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \
	118	" addcon addmtd;" \
	119	"bootm ${kernel_addr} - ${dtb_addr}\0" \
	120	"ubifsargs=set bootargs ubi.mtd=ubi " \
	121	"root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \
	122	"ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \
123	"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \
124	"ubifsload ${dtb_addr} ${dtb_fs};\0" \
125	"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
126	"addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \
127	"load_kernel=tftp ${kernel_addr} ${kernel}\0" \
128	"load_dtb=tftp ${dtb_addr} ${dtb}\0" \
129	"net_nfs=run load_dtb load_kernel; " \
130	"run nfsargs addip addcon addmtd;" \
131	"bootm ${kernel_addr} - ${dtb_addr}\0" \
132	"delenv=env default -a -f; saveenv; reset\0"
133
134	#define CONFIG_BOOTCOMMAND "run nand_ubifs"
135
b29ca4a1 SR	136	/* Print Buffer Size */
	137	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	138	sizeof(CONFIG_SYS_PROMPT) + 16)
b29ca4a1	139
b29ca4a1 SR	140	/* Physical Memory Map */
	141	#define CONFIG_NR_DRAM_BANKS 1
	142	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	143	#define PHYS_SDRAM_SIZE (512 << 20)
	144
	145	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	146	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	147	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	148
	149	#define CONFIG_SYS_INIT_SP_OFFSET \
	150	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	151	#define CONFIG_SYS_INIT_SP_ADDR \
	152	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	153
b29ca4a1 SR	154	/* Enable NAND support */
	155	#define CONFIG_CMD_NAND
	156	#define CONFIG_CMD_NAND_TRIMFFS
b29ca4a1 SR	157
	158	#ifdef CONFIG_CMD_NAND
	159
	160	/* NAND stuff */
	161	#define CONFIG_NAND_MXS
	162	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	163	#define CONFIG_SYS_NAND_BASE 0x40000000
	164	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	165	#define CONFIG_SYS_NAND_ONFI_DETECTION
	166
	167	/* DMA stuff, needed for GPMI/MXS NAND support */
	168	#define CONFIG_APBH_DMA
	169	#define CONFIG_APBH_DMA_BURST
	170	#define CONFIG_APBH_DMA_BURST8
	171
	172	/* Environment in NAND */
	173	#define CONFIG_ENV_IS_IN_NAND
	174	#define CONFIG_ENV_OFFSET (16 << 20)
	175	#define CONFIG_ENV_SECT_SIZE (128 << 10)
	176	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
	177	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
	178	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	179
	180	#else /* CONFIG_CMD_NAND */
	181
	182	/* Environment in MMC */
	183	#define CONFIG_ENV_SIZE (8 << 10)
	184	#define CONFIG_ENV_IS_IN_MMC
	185	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	186	#define CONFIG_SYS_MMC_ENV_DEV 0
	187
	188	#endif /* CONFIG_CMD_NAND */
	189
	190	/* UBI/UBIFS config options */
	191	#define CONFIG_LZO
	192	#define CONFIG_MTD_DEVICE
	193	#define CONFIG_MTD_PARTITIONS
	194	#define CONFIG_RBTREE
	195	#define CONFIG_CMD_MTDPARTS
b29ca4a1 SR	196	#define CONFIG_CMD_UBIFS
b29ca4a1 SR	197
b29ca4a1	198	#endif /* __CONFIG_H */