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c609719b | 1 | /* |
414eec35 | 2 | * (C) Copyright 2002-2005 |
c609719b WD |
3 | * Gary Jennejohn <gj@denx.de> |
4 | * | |
5 | * Configuation settings for the TRAB board. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __CONFIG_H | |
27 | #define __CONFIG_H | |
28 | ||
b2001f27 WD |
29 | /* |
30 | * Default configuration is with 8 MB Flash, 32 MB RAM | |
31 | */ | |
32 | #if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB)) | |
33 | # define CONFIG_FLASH_8MB /* 8 MB Flash */ | |
34 | #endif | |
35 | #if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB)) | |
36 | # define CONFIG_RAM_32MB /* 32 MB SDRAM */ | |
b0639ca3 WD |
37 | #endif |
38 | ||
c609719b WD |
39 | /* |
40 | * High Level Configuration Options | |
41 | * (easy to change) | |
42 | */ | |
43 | #define CONFIG_ARM920T 1 /* This is an arm920t CPU */ | |
6dff5529 WD |
44 | #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */ |
45 | #define CONFIG_TRAB 1 /* on a TRAB Board */ | |
46 | #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */ | |
c609719b | 47 | |
f54ebdfa WD |
48 | /* automatic software updates (see board/trab/auto_update.c) */ |
49 | #define CONFIG_AUTO_UPDATE 1 | |
50 | ||
c609719b | 51 | /* input clock of PLL */ |
7f6c2cbc | 52 | #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */ |
c609719b WD |
53 | |
54 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ | |
55 | ||
56 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
57 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
58 | #define CONFIG_INITRD_TAG 1 | |
59 | ||
6d0f6bcf | 60 | #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enble null device */ |
f72da340 | 61 | #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ |
6dff5529 | 62 | |
a0f2fe52 WD |
63 | #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ |
64 | ||
6dff5529 WD |
65 | /*********************************************************** |
66 | * I2C stuff: | |
67 | * the TRAB is equipped with an ATMEL 24C04 EEPROM at | |
68 | * address 0x54 with 8bit addressing | |
69 | ***********************************************************/ | |
70 | #define CONFIG_HARD_I2C /* I2C with hardware support */ | |
6d0f6bcf JCPV |
71 | #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ |
72 | #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */ | |
6dff5529 | 73 | |
6d0f6bcf JCPV |
74 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 /* EEPROM address */ |
75 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */ | |
6dff5529 | 76 | |
6d0f6bcf JCPV |
77 | #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01 |
78 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */ | |
79 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 | |
6dff5529 | 80 | |
149dded2 | 81 | /* USB stuff */ |
7b59b3c7 | 82 | #define CONFIG_USB_OHCI_NEW 1 |
149dded2 WD |
83 | #define CONFIG_USB_STORAGE 1 |
84 | #define CONFIG_DOS_PARTITION 1 | |
85 | ||
6d0f6bcf JCPV |
86 | #undef CONFIG_SYS_USB_OHCI_BOARD_INIT |
87 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 | |
19d763c3 | 88 | |
6d0f6bcf JCPV |
89 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x14200000 |
90 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c2400" | |
91 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 | |
ddf83a2f | 92 | |
c609719b WD |
93 | /* |
94 | * Size of malloc() pool | |
95 | */ | |
6d0f6bcf JCPV |
96 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
97 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ | |
c609719b WD |
98 | |
99 | /* | |
100 | * Hardware drivers | |
101 | */ | |
102 | #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ | |
103 | #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */ | |
104 | #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ | |
105 | ||
6dff5529 WD |
106 | #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */ |
107 | ||
c609719b WD |
108 | #define CONFIG_VFD 1 /* VFD linear frame buffer driver */ |
109 | #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */ | |
110 | ||
111 | /* | |
112 | * select serial console configuration | |
113 | */ | |
6dff5529 | 114 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */ |
c609719b WD |
115 | |
116 | #define CONFIG_HWFLOW /* include RTS/CTS flow control support */ | |
117 | ||
118 | #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */ | |
119 | ||
120 | #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */ | |
121 | ||
122 | /* | |
123 | * The following enables modem debugging stuff. The dbg() and | |
124 | * 'char screen[1024]' are used for debug printfs. Unfortunately, | |
125 | * it is usable only from BDI | |
126 | */ | |
127 | #undef CONFIG_MODEM_SUPPORT_DEBUG | |
128 | ||
129 | /* allow to overwrite serial and ethaddr */ | |
130 | #define CONFIG_ENV_OVERWRITE | |
131 | ||
132 | #define CONFIG_BAUDRATE 115200 | |
133 | ||
134 | #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */ | |
135 | ||
48b42616 WD |
136 | /* Use s3c2400's RTC */ |
137 | #define CONFIG_RTC_S3C24X0 1 | |
138 | ||
6c18eb98 | 139 | |
079a136c JL |
140 | /* |
141 | * BOOTP options | |
142 | */ | |
143 | #define CONFIG_BOOTP_BOOTFILESIZE | |
144 | #define CONFIG_BOOTP_BOOTPATH | |
145 | #define CONFIG_BOOTP_GATEWAY | |
146 | #define CONFIG_BOOTP_HOSTNAME | |
147 | ||
148 | ||
6c18eb98 JL |
149 | /* |
150 | * Command line configuration. | |
151 | */ | |
152 | #include <config_cmd_default.h> | |
153 | ||
154 | #define CONFIG_CMD_BSP | |
155 | #define CONFIG_CMD_DATE | |
156 | #define CONFIG_CMD_DHCP | |
157 | #define CONFIG_CMD_FAT | |
158 | #define CONFIG_CMD_NFS | |
159 | #define CONFIG_CMD_SNTP | |
160 | #define CONFIG_CMD_USB | |
161 | ||
c609719b | 162 | #ifdef CONFIG_HWFLOW |
6c18eb98 | 163 | #define CONFIG_CMD_HWFLOW |
c609719b WD |
164 | #endif |
165 | ||
166 | #ifdef CONFIG_VFD | |
6c18eb98 | 167 | #define CONFIG_CMD_VFD |
c609719b WD |
168 | #endif |
169 | ||
6dff5529 | 170 | #ifdef CONFIG_DRIVER_S3C24X0_I2C |
6c18eb98 JL |
171 | #define CONFIG_CMD_EEPROM |
172 | #define CONFIG_CMD_I2C | |
6dff5529 WD |
173 | #endif |
174 | ||
c609719b | 175 | #ifndef USE_920T_MMU |
6c18eb98 | 176 | #undef CONFIG_CMD_CACHE |
c609719b WD |
177 | #endif |
178 | ||
6c18eb98 | 179 | |
149dded2 | 180 | /* moved up */ |
6d0f6bcf | 181 | #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ |
149dded2 | 182 | |
c609719b | 183 | #define CONFIG_BOOTDELAY 5 |
c8c3a8be | 184 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ |
c609719b | 185 | #define CONFIG_PREBOOT "echo;echo *** booting ***;echo" |
6dff5529 WD |
186 | #define CONFIG_BOOTARGS "console=ttyS0" |
187 | #define CONFIG_NETMASK 255.255.0.0 | |
6069ff26 | 188 | #define CONFIG_IPADDR 192.168.3.68 |
43d9616c | 189 | #define CONFIG_HOSTNAME trab |
c609719b | 190 | #define CONFIG_SERVERIP 192.168.3.1 |
a0ff7f2e | 191 | #define CONFIG_BOOTCOMMAND "burn_in" |
47cd00fa | 192 | |
b0639ca3 | 193 | #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */ |
6d0f6bcf | 194 | #ifdef CONFIG_SYS_HUSH_PARSER |
149dded2 WD |
195 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
196 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
197 | "nfsroot=$serverip:$rootpath\0" \ | |
198 | "rootpath=/opt/eldk/arm_920TDI\0" \ | |
199 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
200 | "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \ | |
201 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ | |
202 | "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \ | |
f54ebdfa WD |
203 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
204 | "load=tftp C100000 ${u-boot}\0" \ | |
205 | "update=protect off 0 5FFFF;era 0 5FFFF;" \ | |
206 | "cp.b C100000 0 $filesize\0" \ | |
149dded2 WD |
207 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
208 | "loadaddr=c400000\0" \ | |
209 | "net_load=tftpboot $loadaddr $loadfile\0" \ | |
210 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ | |
4654af27 | 211 | "kernel_addr=00060000\0" \ |
149dded2 WD |
212 | "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \ |
213 | "mdm_init1=ATZ\0" \ | |
214 | "mdm_init2=ATS0=1\0" \ | |
215 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 216 | #else /* !CONFIG_SYS_HUSH_PARSER */ |
c609719b WD |
217 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
218 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 219 | "nfsroot=${serverip}:${rootpath}\0" \ |
c609719b WD |
220 | "rootpath=/opt/eldk/arm_920TDI\0" \ |
221 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
fe126d8b WD |
222 | "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \ |
223 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \ | |
224 | "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \ | |
f54ebdfa | 225 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
fe126d8b | 226 | "load=tftp C100000 ${u-boot}\0" \ |
f54ebdfa | 227 | "update=protect off 0 5FFFF;era 0 5FFFF;" \ |
fe126d8b | 228 | "cp.b C100000 0 ${filesize}\0" \ |
47cd00fa | 229 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
c609719b | 230 | "loadaddr=c400000\0" \ |
fe126d8b | 231 | "net_load=tftpboot ${loadaddr} ${loadfile}\0" \ |
c609719b | 232 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ |
f54ebdfa | 233 | "kernel_addr=000C0000\0" \ |
fe126d8b | 234 | "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \ |
c609719b WD |
235 | "mdm_init1=ATZ\0" \ |
236 | "mdm_init2=ATS0=1\0" \ | |
237 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 238 | #endif /* CONFIG_SYS_HUSH_PARSER */ |
53677ef1 | 239 | #else /* CONFIG_FLASH_8MB => 8 MB flash */ |
6d0f6bcf | 240 | #ifdef CONFIG_SYS_HUSH_PARSER |
149dded2 WD |
241 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
242 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
243 | "nfsroot=$serverip:$rootpath\0" \ | |
244 | "rootpath=/opt/eldk/arm_920TDI\0" \ | |
245 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
246 | "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \ | |
247 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ | |
248 | "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \ | |
efa329cb | 249 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
f54ebdfa WD |
250 | "load=tftp C100000 ${u-boot}\0" \ |
251 | "update=protect off 0 3FFFF;era 0 3FFFF;" \ | |
252 | "cp.b C100000 0 $filesize;" \ | |
253 | "setenv filesize;saveenv\0" \ | |
149dded2 | 254 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
f54ebdfa | 255 | "loadaddr=C400000\0" \ |
149dded2 WD |
256 | "net_load=tftpboot $loadaddr $loadfile\0" \ |
257 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ | |
f54ebdfa | 258 | "kernel_addr=000C0000\0" \ |
149dded2 WD |
259 | "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \ |
260 | "mdm_init1=ATZ\0" \ | |
261 | "mdm_init2=ATS0=1\0" \ | |
262 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 263 | #else /* !CONFIG_SYS_HUSH_PARSER */ |
47cd00fa WD |
264 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
265 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 266 | "nfsroot=${serverip}:${rootpath}\0" \ |
47cd00fa WD |
267 | "rootpath=/opt/eldk/arm_920TDI\0" \ |
268 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
fe126d8b WD |
269 | "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \ |
270 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \ | |
271 | "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \ | |
efa329cb | 272 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
fe126d8b | 273 | "load=tftp C100000 ${u-boot}\0" \ |
f54ebdfa | 274 | "update=protect off 0 3FFFF;era 0 3FFFF;" \ |
fe126d8b | 275 | "cp.b C100000 0 ${filesize};" \ |
f54ebdfa | 276 | "setenv filesize;saveenv\0" \ |
47cd00fa | 277 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
f54ebdfa | 278 | "loadaddr=C400000\0" \ |
fe126d8b | 279 | "net_load=tftpboot ${loadaddr} ${loadfile}\0" \ |
47cd00fa | 280 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ |
f54ebdfa | 281 | "kernel_addr=000C0000\0" \ |
fe126d8b | 282 | "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \ |
47cd00fa WD |
283 | "mdm_init1=ATZ\0" \ |
284 | "mdm_init2=ATS0=1\0" \ | |
285 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 286 | #endif /* CONFIG_SYS_HUSH_PARSER */ |
b0639ca3 | 287 | #endif /* CONFIG_FLASH_8MB */ |
c609719b | 288 | |
151ab83a | 289 | #if 1 /* feel free to disable for development */ |
c609719b | 290 | #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ |
f2302d44 SR |
291 | #define CONFIG_AUTOBOOT_PROMPT \ |
292 | "\nEnter password - autoboot in %d sec...\n", bootdelay | |
151ab83a | 293 | #define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */ |
c609719b WD |
294 | #endif |
295 | ||
6c18eb98 | 296 | #if defined(CONFIG_CMD_KGDB) |
c609719b WD |
297 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
298 | /* what's this ? it's not used anywhere */ | |
299 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ | |
300 | #endif | |
301 | ||
302 | /* | |
303 | * Miscellaneous configurable options | |
304 | */ | |
6d0f6bcf JCPV |
305 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
306 | #define CONFIG_SYS_PROMPT "TRAB # " /* Monitor Command Prompt */ | |
307 | #ifdef CONFIG_SYS_HUSH_PARSER | |
308 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
6dff5529 WD |
309 | #endif |
310 | ||
6d0f6bcf JCPV |
311 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
312 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
313 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
314 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
c609719b | 315 | |
6d0f6bcf JCPV |
316 | #define CONFIG_SYS_MEMTEST_START 0x0C000000 /* memtest works on */ |
317 | #define CONFIG_SYS_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */ | |
c609719b | 318 | |
6d0f6bcf | 319 | #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
c609719b | 320 | |
6d0f6bcf | 321 | #define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */ |
c609719b WD |
322 | |
323 | #ifdef CONFIG_TRAB_50MHZ | |
324 | /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ | |
325 | /* it to wrap 100 times (total 1562500) to get 1 sec. */ | |
326 | /* this should _really_ be calculated !! */ | |
6d0f6bcf | 327 | #define CONFIG_SYS_HZ 1562500 |
c609719b WD |
328 | #else |
329 | /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */ | |
330 | /* it to wrap 100 times (total 1039000) to get 1 sec. */ | |
331 | /* this should _really_ be calculated !! */ | |
6d0f6bcf | 332 | #define CONFIG_SYS_HZ 1039000 |
c609719b WD |
333 | #endif |
334 | ||
335 | /* valid baudrates */ | |
6d0f6bcf | 336 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
c609719b WD |
337 | |
338 | #define CONFIG_MISC_INIT_R /* have misc_init_r() function */ | |
339 | ||
4f7cb08e | 340 | /*----------------------------------------------------------------------- |
a0ff7f2e | 341 | * burn-in test stuff. |
42d1f039 | 342 | * |
a0ff7f2e WD |
343 | * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle |
344 | * Because the burn-in test itself causes also an delay of about 4 seconds, | |
345 | * this time must be subtracted from the desired overall burn-in cycle time. | |
4f7cb08e | 346 | */ |
a0ff7f2e | 347 | #define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */ |
4f7cb08e | 348 | |
c609719b WD |
349 | /*----------------------------------------------------------------------- |
350 | * Stack sizes | |
351 | * | |
352 | * The stack sizes are set up in start.S using the settings below | |
353 | */ | |
354 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
355 | #ifdef CONFIG_USE_IRQ | |
356 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ | |
357 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ | |
358 | #endif | |
359 | ||
360 | /*----------------------------------------------------------------------- | |
361 | * Physical Memory Map | |
362 | */ | |
6dff5529 | 363 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
f54ebdfa | 364 | #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */ |
b0639ca3 | 365 | #ifndef CONFIG_RAM_16MB |
f54ebdfa WD |
366 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
367 | #else | |
6dff5529 | 368 | #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ |
f54ebdfa | 369 | #endif |
c609719b | 370 | |
6d0f6bcf | 371 | #define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */ |
c609719b WD |
372 | |
373 | /* The following #defines are needed to get flash environment right */ | |
6d0f6bcf JCPV |
374 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
375 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) | |
c609719b | 376 | |
6ebc7921 | 377 | /* Dynamic MTD partition support */ |
68d7d651 | 378 | #define CONFIG_CMD_MTDPARTS |
6ebc7921 WD |
379 | #define MTDIDS_DEFAULT "nor0=0" |
380 | ||
381 | /* production flash layout */ | |
33322403 | 382 | #define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \ |
6ebc7921 WD |
383 | "16k(Env1)," \ |
384 | "16k(Env2)," \ | |
33322403 | 385 | "336k(Firmware2)ro," \ |
6ebc7921 WD |
386 | "896k(Kernel)," \ |
387 | "5376k(Root-FS)," \ | |
388 | "1408k(JFFS2)," \ | |
389 | "-(VFD)" | |
390 | ||
c609719b WD |
391 | /*----------------------------------------------------------------------- |
392 | * FLASH and environment organization | |
393 | */ | |
6d0f6bcf | 394 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
b0639ca3 | 395 | #ifndef CONFIG_FLASH_8MB |
6d0f6bcf | 396 | #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
f54ebdfa | 397 | #else |
6d0f6bcf | 398 | #define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ |
43d9616c | 399 | #endif |
c609719b WD |
400 | |
401 | /* timeout values are in ticks */ | |
6d0f6bcf JCPV |
402 | #define CONFIG_SYS_FLASH_ERASE_TOUT (15*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
403 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
c609719b | 404 | |
5a1aceb0 | 405 | #define CONFIG_ENV_IS_IN_FLASH 1 |
c609719b WD |
406 | |
407 | /* Address and size of Primary Environment Sector */ | |
b0639ca3 | 408 | #ifndef CONFIG_FLASH_8MB |
6d0f6bcf | 409 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000) |
0e8d1586 JCPV |
410 | #define CONFIG_ENV_SIZE 0x4000 |
411 | #define CONFIG_ENV_SECT_SIZE 0x20000 | |
43d9616c | 412 | #else |
6d0f6bcf | 413 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000) |
0e8d1586 JCPV |
414 | #define CONFIG_ENV_SIZE 0x4000 |
415 | #define CONFIG_ENV_SECT_SIZE 0x4000 | |
43d9616c | 416 | #endif |
c609719b WD |
417 | |
418 | /* Address and size of Redundant Environment Sector */ | |
0e8d1586 JCPV |
419 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE) |
420 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
c609719b | 421 | |
6d0f6bcf | 422 | #define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */ |
67c31036 | 423 | |
1cb8e980 | 424 | /* Initial value of the on-board touch screen brightness */ |
6d0f6bcf | 425 | #define CONFIG_SYS_BRIGHTNESS 0x20 |
1cb8e980 | 426 | |
c609719b | 427 | #endif /* __CONFIG_H */ |