[people/ms/u-boot.git] / include / configs / tuxa1.h

/*
 * Copyright (C) 2006 Freescale Semiconductor, Inc.
 *                    Dave Liu <daveliu@freescale.com>
 *
 * Copyright (C) 2007 Logic Product Development, Inc.
 *                    Peter Barada <peterb@logicpd.com>
 *
 * Copyright (C) 2007 MontaVista Software, Inc.
 *                    Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * (C) Copyright 2008
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 *
 * (C) Copyright 2010
 * Yan Bin, Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_TUXA1		/* TUXA1 board specific */
#define CONFIG_HOSTNAME		tuxa1
#define CONFIG_KM_BOARD_NAME   "tuxa1"

#define	CONFIG_SYS_TEXT_BASE	0xF0000000

/* include common defines/options for all 8321 Keymile boards */
#include "km/km8321-common.h"

#define	CONFIG_SYS_LPXF_BASE		0xA0000000    /* LPXF */
#define	CONFIG_SYS_LPXF_SIZE		256 /* Megabytes */
#define	CONFIG_SYS_PINC2_BASE		0xB0000000    /* PINC2 */
#define	CONFIG_SYS_PINC2_SIZE		256 /* Megabytes */

/*
 * Init Local Bus Memory Controller:
 *
 * Bank Bus     Machine PortSz  Size  Device
 * ---- ---     ------- ------  -----  ------
 *  2   Local   GPCM    8 bit  256MB	LPXF
 *  3   Local   GPCM    8 bit  256MB	PINC2
 *
 */

/*
 * LPXF on the local bus CS2
 * Window base at flash base
 * Window size: 256 MB
 */
#define CONFIG_SYS_LBLAWBAR2_PRELIM	CONFIG_SYS_LPXF_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM	(LBLAWAR_EN | LBLAWAR_256MB)

#define CONFIG_SYS_BR2_PRELIM       (CONFIG_SYS_LPXF_BASE | \
				BR_PS_8 | \
				BR_MS_GPCM | \
				BR_V)

#define CONFIG_SYS_OR2_PRELIM	(MEG_TO_AM(CONFIG_SYS_LPXF_SIZE) | \
				 OR_GPCM_CSNT | \
				 OR_GPCM_ACS_DIV4 | \
				 OR_GPCM_SCY_2 | \
				 (OR_GPCM_TRLX & \
				 (~OR_GPCM_EHTR)) |  /* EHTR = 0 */ \
				 OR_GPCM_EAD)
/*
 * PINC2 on the local bus CS3
 * Access window base at PINC2 base
 * Window size: 256 MB
 */
#define CONFIG_SYS_LBLAWBAR3_PRELIM	CONFIG_SYS_PINC2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM	(LBLAWAR_EN | LBLAWAR_256MB)

#define CONFIG_SYS_BR3_PRELIM	(CONFIG_SYS_PINC2_BASE | \
				 BR_PS_8 | \
				 BR_MS_GPCM | \
				 BR_V)

#define CONFIG_SYS_OR3_PRELIM	(MEG_TO_AM(CONFIG_SYS_PINC2_SIZE) | \
				 OR_GPCM_CSNT | \
				 (OR_GPCM_ACS_DIV2 & /* ACS = 11 */ \
				 (~OR_GPCM_XACS)) |  /* XACS = 0 */ \
				 (OR_GPCM_SCY_2 & \
				 (~OR_GPCM_EHTR)) |  /* EHTR = 0 */ \
				 OR_GPCM_TRLX)

#define CONFIG_SYS_MAMR		(MxMR_GPL_x4DIS | \
				 0x0000c000 | \
				 MxMR_WLFx_2X)

/*
 * MMU Setup
 */
/* LPXF:  icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT5L	(CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
				 BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT5U	(CONFIG_SYS_LPXF_BASE | BATU_BL_256M | \
				 BATU_VS | BATU_VP)
#define CONFIG_SYS_DBAT5L	(CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
				 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
#define CONFIG_SYS_DBAT5U	CONFIG_SYS_IBAT5U

/* PINC2:  icache cacheable, but dcache-inhibit and guarded */
#define CONFIG_SYS_IBAT6L	(CONFIG_SYS_PINC2_BASE | BATL_PP_10 | \
				 BATL_MEMCOHERENCE)
#define CONFIG_SYS_IBAT6U	(CONFIG_SYS_PINC2_BASE | BATU_BL_256M | \
				 BATU_VS | BATU_VP)
#define CONFIG_SYS_DBAT6L	(CONFIG_SYS_PINC2_BASE | BATL_PP_10 | \
				 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
#define CONFIG_SYS_DBAT6U	CONFIG_SYS_IBAT6U

#define CONFIG_SYS_IBAT7L	(0)
#define CONFIG_SYS_IBAT7U	(0)
#define CONFIG_SYS_DBAT7L	CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U	CONFIG_SYS_IBAT7U

#endif /* __CONFIG_H */
Commit	Line	Data
9a276bb0 HS	1	/*
	2	* Copyright (C) 2006 Freescale Semiconductor, Inc.
	3	* Dave Liu <daveliu@freescale.com>
	4	*
	5	* Copyright (C) 2007 Logic Product Development, Inc.
	6	* Peter Barada <peterb@logicpd.com>
	7	*
	8	* Copyright (C) 2007 MontaVista Software, Inc.
	9	* Anton Vorontsov <avorontsov@ru.mvista.com>
	10	*
	11	* (C) Copyright 2008
	12	* Heiko Schocher, DENX Software Engineering, hs@denx.de.
	13	*
	14	* (C) Copyright 2010
	15	* Yan Bin, Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
	16	*
	17	* This program is free software; you can redistribute it and/or
	18	* modify it under the terms of the GNU General Public License as
	19	* published by the Free Software Foundation; either version 2 of
	20	* the License, or (at your option) any later version.
	21	*/
	22
	23	#ifndef __CONFIG_H
	24	#define __CONFIG_H
	25
	26	/*
	27	* High Level Configuration Options
	28	*/
9a276bb0 HS	29	#define CONFIG_TUXA1 /* TUXA1 board specific */
	30	#define CONFIG_HOSTNAME tuxa1
	31	#define CONFIG_KM_BOARD_NAME "tuxa1"
	32
	33	#define CONFIG_SYS_TEXT_BASE 0xF0000000
9a276bb0	34
8ed74341	35	/* include common defines/options for all 8321 Keymile boards */
264eaa0e	36	#include "km/km8321-common.h"
9a276bb0	37
9a276bb0 HS	38	#define CONFIG_SYS_LPXF_BASE 0xA0000000 /* LPXF */
	39	#define CONFIG_SYS_LPXF_SIZE 256 /* Megabytes */
	40	#define CONFIG_SYS_PINC2_BASE 0xB0000000 /* PINC2 */
	41	#define CONFIG_SYS_PINC2_SIZE 256 /* Megabytes */
	42
9a276bb0 HS	43	/*
	44	* Init Local Bus Memory Controller:
	45	*
	46	* Bank Bus Machine PortSz Size Device
	47	* ---- --- ------- ------ ----- ------
	48	* 2 Local GPCM 8 bit 256MB LPXF
	49	* 3 Local GPCM 8 bit 256MB PINC2
	50	*
	51	*/
	52
	53	/*
	54	* LPXF on the local bus CS2
	55	* Window base at flash base
	56	* Window size: 256 MB
	57	*/
	58	#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LPXF_BASE
	59	#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN \| LBLAWAR_256MB)
	60
	61	#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LPXF_BASE \| \
	62	BR_PS_8 \| \
	63	BR_MS_GPCM \| \
	64	BR_V)
	65
	66	#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_LPXF_SIZE) \| \
	67	OR_GPCM_CSNT \| \
	68	OR_GPCM_ACS_DIV4 \| \
	69	OR_GPCM_SCY_2 \| \
	70	(OR_GPCM_TRLX & \
	71	(~OR_GPCM_EHTR)) \| /* EHTR = 0 */ \
	72	OR_GPCM_EAD)
	73	/*
	74	* PINC2 on the local bus CS3
	75	* Access window base at PINC2 base
	76	* Window size: 256 MB
	77	*/
	78	#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_PINC2_BASE
	79	#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN \| LBLAWAR_256MB)
	80
	81	#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_PINC2_BASE \| \
	82	BR_PS_8 \| \
	83	BR_MS_GPCM \| \
	84	BR_V)
	85
	86	#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_PINC2_SIZE) \| \
	87	OR_GPCM_CSNT \| \
	88	(OR_GPCM_ACS_DIV2 & /* ACS = 11 */ \
	89	(~OR_GPCM_XACS)) \| /* XACS = 0 */ \
	90	(OR_GPCM_SCY_2 & \
	91	(~OR_GPCM_EHTR)) \| /* EHTR = 0 */ \
	92	OR_GPCM_TRLX)
	93
	94	#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS \| \
	95	0x0000c000 \| \
	96	MxMR_WLFx_2X)
	97
	98	/*
	99	* MMU Setup
	100	*/
	101	/* LPXF: icache cacheable, but dcache-inhibit and guarded */
	102	#define CONFIG_SYS_IBAT5L (CONFIG_SYS_LPXF_BASE \| BATL_PP_10 \| \
	103	BATL_MEMCOHERENCE)
	104	#define CONFIG_SYS_IBAT5U (CONFIG_SYS_LPXF_BASE \| BATU_BL_256M \| \
	105	BATU_VS \| BATU_VP)
	106	#define CONFIG_SYS_DBAT5L (CONFIG_SYS_LPXF_BASE \| BATL_PP_10 \| \
107	BATL_CACHEINHIBIT \| BATL_GUARDEDSTORAGE)
108	#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
109
9a276bb0 HS	110	/* PINC2: icache cacheable, but dcache-inhibit and guarded */
	111	#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PINC2_BASE \| BATL_PP_10 \| \
	112	BATL_MEMCOHERENCE)
	113	#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PINC2_BASE \| BATU_BL_256M \| \
	114	BATU_VS \| BATU_VP)
	115	#define CONFIG_SYS_DBAT6L (CONFIG_SYS_PINC2_BASE \| BATL_PP_10 \| \
	116	BATL_CACHEINHIBIT \| BATL_GUARDEDSTORAGE)
	117	#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
	118
	119	#define CONFIG_SYS_IBAT7L (0)
	120	#define CONFIG_SYS_IBAT7U (0)
	121	#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
	122	#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
9a276bb0 HS	123
9a276bb0 HS	124	#endif /* __CONFIG_H */