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6dedf3d4 | 1 | /* |
7f625fc6 | 2 | * (C) Copyright 2003-2009 |
6dedf3d4 HS |
3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __CONFIG_H | |
25 | #define __CONFIG_H | |
26 | ||
27 | /* | |
28 | * High Level Configuration Options | |
29 | * (easy to change) | |
30 | */ | |
31 | ||
7f625fc6 HS |
32 | #define CONFIG_UC101 1 /* UC101 board */ |
33 | #define CONFIG_HOSTNAME uc101 | |
6dedf3d4 | 34 | |
7f625fc6 HS |
35 | #include "manroland/common.h" |
36 | #include "manroland/mpc5200-common.h" | |
31d82672 | 37 | |
6dedf3d4 HS |
38 | /* |
39 | * Serial console configuration | |
40 | */ | |
6dedf3d4 | 41 | #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
6c18eb98 | 42 | |
079a136c JL |
43 | /* |
44 | * BOOTP options | |
45 | */ | |
46 | #define CONFIG_BOOTP_BOOTFILESIZE | |
47 | #define CONFIG_BOOTP_BOOTPATH | |
48 | #define CONFIG_BOOTP_GATEWAY | |
49 | #define CONFIG_BOOTP_HOSTNAME | |
50 | ||
6dedf3d4 HS |
51 | /* |
52 | * Flash configuration | |
53 | */ | |
7f625fc6 | 54 | #define CONFIG_SYS_MAX_FLASH_SECT 140 |
6dedf3d4 HS |
55 | |
56 | /* | |
57 | * Environment settings | |
58 | */ | |
0e8d1586 | 59 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
6dedf3d4 HS |
60 | |
61 | /* | |
62 | * Memory map | |
63 | */ | |
6d0f6bcf JCPV |
64 | #define CONFIG_SYS_IB_MASTER 0xc0510000 /* CS 6 */ |
65 | #define CONFIG_SYS_IB_EPLD 0xc0500000 /* CS 7 */ | |
6dedf3d4 | 66 | |
6dedf3d4 | 67 | /* SRAM */ |
7f625fc6 | 68 | #define SRAM_BASE CONFIG_SYS_SRAM_BASE |
6dedf3d4 HS |
69 | #define SRAM_LEN 0x1fffff |
70 | #define SRAM_END (SRAM_BASE + SRAM_LEN) | |
71 | ||
6dedf3d4 HS |
72 | /* |
73 | * GPIO configuration | |
74 | */ | |
6d0f6bcf | 75 | #define CONFIG_SYS_GPS_PORT_CONFIG 0x4d558044 |
6dedf3d4 | 76 | |
7f625fc6 HS |
77 | #define CONFIG_SYS_MEMTEST_START 0x00300000 |
78 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 | |
6dedf3d4 | 79 | |
7f625fc6 | 80 | #define CONFIG_SYS_LOAD_ADDR 0x300000 |
6dedf3d4 | 81 | |
6d0f6bcf | 82 | #define CONFIG_SYS_BOOTCS_CFG 0x00045D00 |
6dedf3d4 HS |
83 | |
84 | /* 8Mbit SRAM @0x80100000 */ | |
6d0f6bcf JCPV |
85 | #define CONFIG_SYS_CS1_SIZE 0x00200000 |
86 | #define CONFIG_SYS_CS1_CFG 0x21D00 | |
6dedf3d4 HS |
87 | |
88 | /* Display H1, Status Inputs, EPLD @0x80600000 8 Bit */ | |
6d0f6bcf JCPV |
89 | #define CONFIG_SYS_CS3_START CONFIG_SYS_DISPLAY_BASE |
90 | #define CONFIG_SYS_CS3_SIZE 0x00000100 | |
91 | #define CONFIG_SYS_CS3_CFG 0x00081802 | |
6dedf3d4 HS |
92 | |
93 | /* Interbus Master 16 Bit */ | |
6d0f6bcf JCPV |
94 | #define CONFIG_SYS_CS6_START CONFIG_SYS_IB_MASTER |
95 | #define CONFIG_SYS_CS6_SIZE 0x00010000 | |
96 | #define CONFIG_SYS_CS6_CFG 0x00FF3500 | |
6dedf3d4 HS |
97 | |
98 | /* Interbus EPLD 8 Bit */ | |
6d0f6bcf JCPV |
99 | #define CONFIG_SYS_CS7_START CONFIG_SYS_IB_EPLD |
100 | #define CONFIG_SYS_CS7_SIZE 0x00010000 | |
101 | #define CONFIG_SYS_CS7_CFG 0x00081800 | |
6dedf3d4 | 102 | |
6dedf3d4 HS |
103 | /*----------------------------------------------------------------------- |
104 | * IDE/ATA stuff Supports IDE harddisk | |
105 | *----------------------------------------------------------------------- | |
106 | */ | |
107 | ||
7f625fc6 | 108 | #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus*/ |
6dedf3d4 HS |
109 | |
110 | /*---------------------------------------------------------------------*/ | |
111 | /* Display addresses */ | |
112 | /*---------------------------------------------------------------------*/ | |
6d0f6bcf JCPV |
113 | #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38) |
114 | #define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30) | |
6dedf3d4 HS |
115 | |
116 | #endif /* __CONFIG_H */ |