projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 1dcdd862 MK |
1 | /* |
| 2 | * (C) Copyright 2007-2013 | |
| 3 | * Stelian Pop <stelian.pop@leadtechdesign.com> | |
| 4 | * Lead Tech Design <www.leadtechdesign.com> | |
| 5 | * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com> | |
| 6 | * Mateusz Kulikowski <mateusz.kulikowski@gmail.com> | |
| 7 | * | |
| 8 | * Settings for Calao USB-A9263 board | |
| 9 | * | |
| 10 | * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap | |
| 11 | * installed on board will not be able to load it properly. | |
| 12 | * | |
| 13 | * SPDX-License-Identifier: GPL-2.0+ | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef __CONFIG_H | |
| 17 | #define __CONFIG_H | |
| 18 | #include <asm/hardware.h> | |
| 19 | ||
| 20 | /* ARM asynchronous clock */ | |
| 21 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ | |
| 22 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
| 1dcdd862 MK |
23 | |
| 24 | #define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263 | |
| 25 | ||
| 26 | #define CONFIG_ARCH_CPU_INIT | |
| 27 | ||
| 28 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
| 29 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 30 | #define CONFIG_INITRD_TAG | |
| 31 | ||
| 32 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
| 33 | ||
| 1dcdd862 MK |
34 | #define CONFIG_SYS_TEXT_BASE 0x23f00000 |
| 35 | ||
| 36 | /* | |
| 37 | * Hardware drivers | |
| 38 | */ | |
| 39 | #define CONFIG_AT91_GPIO | |
| 40 | ||
| 41 | /* serial console */ | |
| 42 | #define CONFIG_ATMEL_USART | |
| 43 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
| 44 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
| 1dcdd862 | 45 | |
| 1dcdd862 MK |
46 | |
| 47 | /* | |
| 48 | * BOOTP options | |
| 49 | */ | |
| 50 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 51 | #define CONFIG_BOOTP_BOOTPATH | |
| 52 | #define CONFIG_BOOTP_GATEWAY | |
| 53 | #define CONFIG_BOOTP_HOSTNAME | |
| 54 | ||
| 55 | /* | |
| 56 | * Command line configuration. | |
| 57 | */ | |
| 1dcdd862 MK |
58 | #define CONFIG_CMD_NAND |
| 59 | ||
| 60 | /* SDRAM */ | |
| 61 | #define CONFIG_NR_DRAM_BANKS 1 | |
| 62 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 | |
| 63 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
| 64 | ||
| 65 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 66 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
| 67 | ||
| 68 | /* DataFlash */ | |
| 69 | #define CONFIG_ATMEL_DATAFLASH_SPI | |
| 70 | #define CONFIG_HAS_DATAFLASH | |
| 1dcdd862 MK |
71 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
| 72 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 | |
| 73 | #define AT91_SPI_CLK 8000000 | |
| 74 | #define DATAFLASH_TCSS (0x1a << 16) | |
| 75 | #define DATAFLASH_TCHS (0x1 << 24) | |
| 76 | ||
| 1dcdd862 MK |
77 | /* NAND flash */ |
| 78 | #ifdef CONFIG_CMD_NAND | |
| 79 | #define CONFIG_NAND_ATMEL | |
| 80 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| 81 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
| 82 | /* our ALE is AD21 */ | |
| 83 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 84 | /* our CLE is AD22 */ | |
| 85 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 86 | #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) | |
| 87 | #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) | |
| 88 | #endif | |
| 89 | ||
| 90 | #define MTDPARTS_DEFAULT \ | |
| 91 | "mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" | |
| 92 | ||
| 93 | /* Ethernet */ | |
| 94 | #define CONFIG_MACB | |
| 95 | #define CONFIG_RMII | |
| 96 | #define CONFIG_NET_RETRY_COUNT 20 | |
| 97 | #define CONFIG_AT91_WANTS_COMMON_PHY | |
| 98 | ||
| 99 | /* USB */ | |
| 100 | #ifdef CONFIG_CMD_USB | |
| 101 | #define CONFIG_USB_ATMEL | |
| 102 | #define CONFIG_USB_OHCI_NEW | |
| 1dcdd862 MK |
103 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 104 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 | |
| 105 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" | |
| 106 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
| 1dcdd862 MK |
107 | #endif |
| 108 | ||
| 109 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 | |
| 110 | ||
| 111 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
| 112 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
| 113 | ||
| 114 | /* bootstrap + u-boot + env in dataflash on CS0 */ | |
| 115 | #define CONFIG_ENV_IS_IN_DATAFLASH | |
| 116 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x4000) | |
| 117 | #define CONFIG_ENV_OFFSET 0x2000 | |
| 118 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ | |
| 119 | CONFIG_ENV_OFFSET) | |
| 120 | #define CONFIG_ENV_SIZE 0x2000 | |
| 121 | #define CONFIG_BOOTCOMMAND "nboot 21000000 0" | |
| 122 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
| 123 | "root=/dev/mtdblock1 " \ | |
| 124 | "mtdparts=" MTDPARTS_DEFAULT " " \ | |
| 125 | "rw rootfstype=jffs2" | |
| 126 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 127 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
| 128 | ||
| 1dcdd862 MK |
129 | #define CONFIG_SYS_CBSIZE 256 |
| 130 | #define CONFIG_SYS_MAXARGS 16 | |
| 131 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
| 132 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 133 | #define CONFIG_CMDLINE_EDITING | |
| 134 | #define CONFIG_AUTO_COMPLETE | |
| 1dcdd862 MK |
135 | #define CONFIG_SYS_LONGHELP |
| 136 | ||
| 137 | /* | |
| 138 | * Size of malloc() pool | |
| 139 | */ | |
| 140 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
| 141 | ||
| 142 | #endif |