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1dcdd862 MK |
1 | /* |
2 | * (C) Copyright 2007-2013 | |
3 | * Stelian Pop <stelian.pop@leadtechdesign.com> | |
4 | * Lead Tech Design <www.leadtechdesign.com> | |
5 | * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com> | |
6 | * Mateusz Kulikowski <mateusz.kulikowski@gmail.com> | |
7 | * | |
8 | * Settings for Calao USB-A9263 board | |
9 | * | |
10 | * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap | |
11 | * installed on board will not be able to load it properly. | |
12 | * | |
13 | * SPDX-License-Identifier: GPL-2.0+ | |
14 | */ | |
15 | ||
16 | #ifndef __CONFIG_H | |
17 | #define __CONFIG_H | |
18 | #include <asm/hardware.h> | |
19 | ||
20 | /* ARM asynchronous clock */ | |
21 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ | |
22 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
1dcdd862 MK |
23 | |
24 | #define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263 | |
25 | ||
26 | #define CONFIG_ARCH_CPU_INIT | |
27 | ||
28 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
29 | #define CONFIG_SETUP_MEMORY_TAGS | |
30 | #define CONFIG_INITRD_TAG | |
31 | ||
32 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
33 | ||
34 | #define CONFIG_DISPLAY_CPUINFO | |
35 | ||
1dcdd862 MK |
36 | #define CONFIG_SYS_TEXT_BASE 0x23f00000 |
37 | ||
38 | /* | |
39 | * Hardware drivers | |
40 | */ | |
41 | #define CONFIG_AT91_GPIO | |
42 | ||
43 | /* serial console */ | |
44 | #define CONFIG_ATMEL_USART | |
45 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
46 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
47 | #define CONFIG_BAUDRATE 115200 | |
48 | ||
49 | #define CONFIG_BOOTDELAY 3 | |
50 | ||
51 | /* | |
52 | * BOOTP options | |
53 | */ | |
54 | #define CONFIG_BOOTP_BOOTFILESIZE | |
55 | #define CONFIG_BOOTP_BOOTPATH | |
56 | #define CONFIG_BOOTP_GATEWAY | |
57 | #define CONFIG_BOOTP_HOSTNAME | |
58 | ||
59 | /* | |
60 | * Command line configuration. | |
61 | */ | |
1dcdd862 MK |
62 | #define CONFIG_CMD_PING |
63 | #define CONFIG_CMD_DHCP | |
64 | #define CONFIG_CMD_NAND | |
65 | ||
66 | /* SDRAM */ | |
67 | #define CONFIG_NR_DRAM_BANKS 1 | |
68 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 | |
69 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
70 | ||
71 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
72 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
73 | ||
74 | /* DataFlash */ | |
75 | #define CONFIG_ATMEL_DATAFLASH_SPI | |
76 | #define CONFIG_HAS_DATAFLASH | |
1dcdd862 MK |
77 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
78 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 | |
79 | #define AT91_SPI_CLK 8000000 | |
80 | #define DATAFLASH_TCSS (0x1a << 16) | |
81 | #define DATAFLASH_TCHS (0x1 << 24) | |
82 | ||
83 | /* no NOR flash */ | |
84 | #define CONFIG_SYS_NO_FLASH | |
85 | ||
86 | /* NAND flash */ | |
87 | #ifdef CONFIG_CMD_NAND | |
88 | #define CONFIG_NAND_ATMEL | |
89 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
90 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
91 | /* our ALE is AD21 */ | |
92 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
93 | /* our CLE is AD22 */ | |
94 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
95 | #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) | |
96 | #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) | |
97 | #endif | |
98 | ||
99 | #define MTDPARTS_DEFAULT \ | |
100 | "mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" | |
101 | ||
102 | /* Ethernet */ | |
103 | #define CONFIG_MACB | |
104 | #define CONFIG_RMII | |
105 | #define CONFIG_NET_RETRY_COUNT 20 | |
106 | #define CONFIG_AT91_WANTS_COMMON_PHY | |
107 | ||
108 | /* USB */ | |
109 | #ifdef CONFIG_CMD_USB | |
110 | #define CONFIG_USB_ATMEL | |
111 | #define CONFIG_USB_OHCI_NEW | |
112 | #define CONFIG_DOS_PARTITION | |
113 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
114 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 | |
115 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" | |
116 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
117 | #define CONFIG_USB_STORAGE | |
118 | #define CONFIG_CMD_FAT | |
119 | #endif | |
120 | ||
121 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 | |
122 | ||
123 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
124 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
125 | ||
126 | /* bootstrap + u-boot + env in dataflash on CS0 */ | |
127 | #define CONFIG_ENV_IS_IN_DATAFLASH | |
128 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x4000) | |
129 | #define CONFIG_ENV_OFFSET 0x2000 | |
130 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ | |
131 | CONFIG_ENV_OFFSET) | |
132 | #define CONFIG_ENV_SIZE 0x2000 | |
133 | #define CONFIG_BOOTCOMMAND "nboot 21000000 0" | |
134 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
135 | "root=/dev/mtdblock1 " \ | |
136 | "mtdparts=" MTDPARTS_DEFAULT " " \ | |
137 | "rw rootfstype=jffs2" | |
138 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
139 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
140 | ||
1dcdd862 MK |
141 | #define CONFIG_SYS_CBSIZE 256 |
142 | #define CONFIG_SYS_MAXARGS 16 | |
143 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
144 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
145 | #define CONFIG_CMDLINE_EDITING | |
146 | #define CONFIG_AUTO_COMPLETE | |
147 | #define CONFIG_SYS_HUSH_PARSER | |
148 | #define CONFIG_SYS_LONGHELP | |
149 | ||
150 | /* | |
151 | * Size of malloc() pool | |
152 | */ | |
153 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
154 | ||
155 | #endif |